Searched refs:RS1 (Results 1 – 4 of 4) sorted by relevance
/qemu/target/riscv/ |
H A D | crypto_helper.c | 129 uint64_t RS1 = rs1; in HELPER() local 131 uint32_t rs1_hi = RS1 >> 32; in HELPER() 144 uint64_t RS1 = rs1; in HELPER() local 150 uint32_t temp = (RS1 >> 32) & 0xFFFFFFFF; in HELPER()
|
/qemu/disas/ |
H A D | sparc.c | 209 #define RS1_G0 RS1 (~0) 913 { "membar", F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0|RS1(~0xf)|SIMM13(~127), "K", 0, v9… 914 { "stbar", F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0|RS1(~0xf)|SIMM13(~0), "", 0, v8 }, 1051 { "rd", F3(2, 0x28, 0)|RS1(2), F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0), "E,d", 0, v9 }, /* … 1052 { "rd", F3(2, 0x28, 0)|RS1(3), F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0), "o,d", 0, v9 }, /* … 1053 { "rd", F3(2, 0x28, 0)|RS1(4), F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0), "W,d", 0, v9 }, /* … 1054 { "rd", F3(2, 0x28, 0)|RS1(5), F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9 }, /* … 1055 { "rd", F3(2, 0x28, 0)|RS1(6), F3(~2, ~0x28, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9 }, /* … 1057 { "rd", F3(2, 0x28, 0)|RS1(16), F3(~2, ~0x28, ~0)|RS1(~16)|SIMM13(~0), "/,d", 0, v9a }, /*… 1058 { "rd", F3(2, 0x28, 0)|RS1(17), F3(~2, ~0x28, ~0)|RS1(~17)|SIMM13(~0), "/,d", 0, v9a }, /*… [all …]
|
/qemu/tests/tcg/tricore/asm/ |
H A D | test_dvstep.S | 5 # Result RS1 RS2
|
/qemu/tcg/sparc64/ |
H A D | tcg-target.c.inc | 598 /* Load Y with the sign/zero extension of RS1 to 64-bits. */
|