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Searched refs:RVM (Results 1 – 7 of 7) sorted by relevance

/qemu/target/riscv/insn_trans/
H A Dtrans_rvm.c.inc208 REQUIRE_EXT(ctx, RVM);
240 REQUIRE_EXT(ctx, RVM);
285 REQUIRE_EXT(ctx, RVM);
318 REQUIRE_EXT(ctx, RVM);
333 REQUIRE_EXT(ctx, RVM);
341 REQUIRE_EXT(ctx, RVM);
349 REQUIRE_EXT(ctx, RVM);
357 REQUIRE_EXT(ctx, RVM);
373 REQUIRE_EXT(ctx, RVM);
381 REQUIRE_EXT(ctx, RVM);
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/qemu/target/riscv/
H A Dcpu.c44 const uint32_t misa_bits[] = {RVI, RVE, RVM, RVA, RVF, RVD, RVV,
440 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVU); in riscv_any_cpu_init()
495 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv64_sifive_u_cpu_init()
513 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVC | RVU); in rv64_sifive_e_cpu_init()
654 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVD | RVC | RVS | RVU); in rv32_sifive_u_cpu_init()
672 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVC | RVU); in rv32_sifive_e_cpu_init()
689 riscv_cpu_set_misa_ext(env, RVI | RVM | RVC | RVU); in rv32_ibex_cpu_init()
706 riscv_cpu_set_misa_ext(env, RVI | RVM | RVA | RVF | RVC | RVU); in rv32_imafcu_nommu_cpu_init()
1400 MISA_EXT_INFO(RVM, "m", "Integer multiplication and division"),
2199 .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVU,
H A Dcpu.h60 #define RVM RV('M') macro
H A Dcsr.c1487 if (!(val & RVI && val & RVM && val & RVA && in write_misa()
/qemu/target/riscv/tcg/
H A Dtcg-cpu.c336 uint32_t g_misa_bits[] = {RVI, RVM, RVA, RVF, RVD}; in riscv_cpu_validate_g()
1012 MISA_CFG(RVM, true),
/qemu/target/riscv/kvm/
H A Dkvm-cpu.c185 KVM_MISA_CFG(RVM, KVM_RISCV_ISA_EXT_M),
/qemu/linux-user/
H A Dsyscall.c8893 riscv_has_ext(env, RVM) && in risc_hwprobe_fill_pairs()