Searched refs:R_ (Results 1 – 5 of 5) sorted by relevance
| /qemu/include/hw/ |
| H A D | registerfields.h | 23 enum { R_ ## reg = (addr) / 4 };
27 enum { R_ ## reg = (addr) };
31 enum { R_ ## reg = (addr) / 2 };
35 enum { R_ ## reg = (addr) / 8 };
51 R_ ## reg ## _ ## field ## _LENGTH)
54 R_ ## reg ## _ ## field ## _LENGTH)
57 R_ ## reg ## _ ## field ## _LENGTH)
77 FIELD_EX32((regs)[R_ ## reg], reg, field)
79 FIELD_EX64((regs)[R_ ## reg], reg, field)
153 (regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val);
[all …]
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| /qemu/target/i386/hvf/ |
| H A D | x86_descr.c | 25 [R_##seg] = { \
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| /qemu/hw/nvram/ |
| H A D | xlnx-versal-efuse-ctrl.c | 167 #define BIT_POS(R_, C_) \ argument
169 & ((R_) << R_EFUSE_PGM_ADDR_ROW_SHIFT)) \
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| /qemu/target/arm/ |
| H A D | cpregs.h | 636 FGT_##BITNAME = FGT_##REG | R_##REG##_EL2_##BITNAME##_SHIFT
640 FGT_##BITNAME = FGT_##REG | FGT_REV | R_##REG##_EL2_##BITNAME##_SHIFT
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| /qemu/target/i386/ |
| H A D | cpu.c | 1743 [R_##reg] = { .name = #reg, .qapi_enum = X86_CPU_REGISTER32_##reg }
1833 /* Return name of 32-bit register, from a R_* constant */
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