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Searched refs:R_EDX (Results 1 – 25 of 34) sorted by relevance

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/qemu/target/i386/tcg/
H A Dint_helper.c74 num = (env->regs[R_EAX] & 0xffff) | ((env->regs[R_EDX] & 0xffff) << 16); in helper_divw_AX()
86 env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) | r; in helper_divw_AX()
93 num = (env->regs[R_EAX] & 0xffff) | ((env->regs[R_EDX] & 0xffff) << 16); in helper_idivw_AX()
105 env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) | r; in helper_idivw_AX()
113 num = ((uint32_t)env->regs[R_EAX]) | ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32); in helper_divl_EAX()
124 env->regs[R_EDX] = (uint32_t)r; in helper_divl_EAX()
143 env->regs[R_EDX] = (uint32_t)r; in helper_idivl_EAX()
376 r1 = env->regs[R_EDX]; in helper_divq_EAX()
381 env->regs[R_EDX] = r1; in helper_divq_EAX()
392 r1 = env->regs[R_EDX]; in helper_idivq_EAX()
[all …]
H A Dmisc_helper.c61 env->regs[R_EDX] = edx; in helper_cpuid()
75 env->regs[R_EDX] = (uint32_t)(val >> 32); in helper_rdtsc()
H A Dtranslate.c1291 tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_EDX]); in gen_ins()
1304 tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_EDX]); in gen_outs()
2449 s->T1, cpu_regs[R_EDX]); in gen_cmpxchg8b()
2484 tcg_gen_xor_i64(t1, s->T1, cpu_regs[R_EDX]); in gen_cmpxchg16b()
2498 tcg_gen_mov_i64(cpu_regs[R_EDX], s->T1); in gen_cmpxchg16b()
3719 cpu_regs[R_EDX]); in disas_insn_old()
3887 cpu_regs[R_EDX]); in disas_insn_old()
4326 cpu_regs[R_EDX]); in disas_insn_old()
4338 cpu_regs[R_EDX]); in disas_insn_old()
4503 [R_EDX] = "rdx", in tcg_x86_init()
[all …]
/qemu/target/i386/hvf/
H A Dx86.h203 #define RDX(cpu) RRX(cpu, R_EDX)
221 #define EDX(cpu) ERX(cpu, R_EDX)
231 #define DX(cpu) RX(cpu, R_EDX)
241 #define DL(cpu) RL(cpu, R_EDX)
247 #define DH(cpu) RH(cpu, R_EDX)
H A Dx86_cpuid.c160 case R_EDX: in hvf_get_supported_cpuid()
H A Dx86hvf.c247 wreg(cs->accel->fd, HV_X86_RDX, env->regs[R_EDX]); in hvf_put_registers()
291 env->regs[R_EDX] = rreg(cs->accel->fd, HV_X86_RDX); in hvf_get_registers()
/qemu/linux-user/i386/
H A Dcpu_loop.c176 env->regs[R_EDX], env->regs[10], env->regs[8], in emulate_vsyscall()
228 env->regs[R_EDX], in cpu_loop()
246 env->regs[R_EDX], in cpu_loop()
366 env->regs[R_EDX] = regs->rdx; in target_cpu_copy_regs()
376 env->regs[R_EDX] = regs->edx; in target_cpu_copy_regs()
H A Dsignal.c362 __put_user(env->regs[R_EDX], &sc->edx); in setup_sigcontext()
383 __put_user(env->regs[R_EDX], &sc->rdx); in setup_sigcontext()
497 env->regs[R_EDX] = 0; in setup_frame()
579 env->regs[R_EDX] = frame_addr + offsetof(struct rt_sigframe, info); in setup_rt_frame()
580 __put_user(env->regs[R_EDX], &frame->pinfo); in setup_rt_frame()
587 env->regs[R_EDX] = frame_addr + offsetof(struct rt_sigframe, uc); in setup_rt_frame()
730 env->regs[R_EDX] = tswapl(sc->edx); in restore_sigcontext()
749 env->regs[R_EDX] = tswapl(sc->rdx); in restore_sigcontext()
/qemu/bsd-user/x86_64/
H A Dtarget_arch_cpu.h55 env->regs[R_EDX] = regs->rdx; in target_cpu_init()
133 env->regs[R_EDX], in target_cpu_loop()
H A Dtarget_arch_vmparam.h44 state->regs[R_EDX] = retval2; in set_second_rval()
H A Dtarget_arch_reg.h76 regs->r_rdx = env->regs[R_EDX]; in target_copy_regs()
/qemu/bsd-user/i386/
H A Dtarget_arch_vmparam.h44 state->regs[R_EDX] = retval2; in set_second_rval()
H A Dtarget_arch_reg.h66 regs->r_edx = env->regs[R_EDX]; in target_copy_regs()
H A Dtarget_arch_cpu.h46 env->regs[R_EDX] = regs->edx; in target_cpu_init()
/qemu/target/i386/tcg/sysemu/
H A Dsmm_helper.c90 x86_stq_phys(cs, sm_state + 0x7fe8, env->regs[R_EDX]); in do_smm_enter()
120 x86_stl_phys(cs, sm_state + 0x7fd8, env->regs[R_EDX]); in do_smm_enter()
224 env->regs[R_EDX] = x86_ldq_phys(cs, sm_state + 0x7fe8); in helper_rsm()
268 env->regs[R_EDX] = x86_ldl_phys(cs, sm_state + 0x7fd8); in helper_rsm()
H A Dmisc_helper.c149 ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32); in helper_wrmsr()
511 env->regs[R_EDX] = (uint32_t)(val >> 32); in helper_rdmsr()
/qemu/linux-user/
H A Dvm86.c87 target_v86->regs.edx = tswap32(env->regs[R_EDX]); in save_v86_state()
109 env->regs[R_EDX] = ts->vm86_saved_regs.edx; in save_v86_state()
424 ts->vm86_saved_regs.edx = env->regs[R_EDX]; in do_vm86()
464 env->regs[R_EDX] = tswap32(target_v86->regs.edx); in do_vm86()
/qemu/hw/i386/
H A Dvmmouse.c81 data[2] = env->regs[R_ECX]; data[3] = env->regs[R_EDX]; in vmmouse_get_data()
91 env->regs[R_ECX] = data[2]; env->regs[R_EDX] = data[3]; in vmmouse_set_data()
H A Dvmport.c179 cpu->env.regs[R_EDX] = le32_to_cpu(uuid_parts[3]); in vmport_cmd_get_bios_uuid()
/qemu/target/i386/kvm/
H A Dkvm.c385 case R_EDX: in cpuid_entry_get_reg()
426 if (function == 1 && reg == R_EDX) { in kvm_arch_get_supported_cpuid()
495 (reg == R_EAX || reg == R_EDX)) { in kvm_arch_get_supported_cpuid()
529 } else if (function == 0x80000001 && reg == R_EDX) { in kvm_arch_get_supported_cpuid()
907 {.func = HV_CPUID_FEATURES, .reg = R_EDX,
952 {.func = HV_CPUID_FEATURES, .reg = R_EDX,
992 {.func = HV_CPUID_FEATURES, .reg = R_EDX,
1008 {.func = HV_CPUID_FEATURES, .reg = R_EDX,
1024 {.func = HV_CPUID_FEATURES, .reg = R_EDX,
1031 {.func = HV_CPUID_FEATURES, .reg = R_EDX,
[all …]
/qemu/target/i386/
H A Darch_dump.c66 regs.rdx = env->regs[R_EDX]; in x86_64_write_elf64_note()
133 prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff; in x86_fill_elf_prstatus()
290 s->rdx = env->regs[R_EDX]; in qemu_get_cpustate()
H A Dcpu-dump.c363 env->regs[R_EDX], in x86_cpu_dump_state()
398 (uint32_t)env->regs[R_EDX], in x86_cpu_dump_state()
H A Dgdbstub.c26 R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
/qemu/dump/
H A Dwin_dump.c328 .Rdx = env->regs[R_EDX], in patch_and_save_context()
369 .Edx = env->regs[R_EDX], in patch_and_save_context()
/qemu/hw/i386/xen/
H A Dxen-hvm.c495 env->regs[R_EDX] = vmport_regs->edx; in regs_to_cpu()
507 vmport_regs->edx = env->regs[R_EDX]; in regs_from_cpu()

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