| /qemu/include/hw/net/ |
| H A D | msf2-emac.h | 34 #define R_MAX (0x1a0 / 4) macro
52 uint32_t regs[R_MAX];
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| /qemu/hw/intc/ |
| H A D | etraxfs_pic.c | 39 #define R_MAX 5 macro
52 uint32_t regs[R_MAX];
156 "etraxfs-pic", R_MAX * 4); in etraxfs_pic_init()
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| H A D | xilinx_intc.c | 42 #define R_MAX 8 macro
60 uint32_t regs[R_MAX];
175 R_MAX * 4); in xilinx_intc_init()
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| /qemu/hw/net/ |
| H A D | xilinx_ethlite.c | 47 #define R_MAX (0x2000 / 4) macro
73 uint32_t regs[R_MAX];
202 if (size > (R_MAX - R_RX_BUF0 - rxbase) * 4) { in eth_rx()
250 "xlnx.xps-ethernetlite", R_MAX * 4); in xilinx_ethlite_init()
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| H A D | xgmac.c | 130 #define R_MAX 0x400 macro
155 uint32_t regs[R_MAX];
178 VMSTATE_UINT32_ARRAY(regs, XgmacState, R_MAX),
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| H A D | msf2-emac.c | 545 "msf2-emac", R_MAX * 4); in msf2_emac_init()
564 VMSTATE_UINT32_ARRAY(regs, MSF2EmacState, R_MAX),
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| H A D | xilinx_axienet.c | 301 #define R_MAX (0x34 / 4) macro
369 uint32_t regs[R_MAX];
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| /qemu/hw/char/ |
| H A D | xilinx_uartlite.c | 42 #define R_MAX 4 macro
68 uint32_t regs[R_MAX];
229 "xlnx.xps-uartlite", R_MAX * 4); in xilinx_uartlite_init()
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| H A D | etraxfs_ser.c | 47 #define R_MAX (0x3c / 4) macro
72 uint32_t regs[R_MAX];
232 "etraxfs-serial", R_MAX * 4); in etraxfs_ser_init()
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| /qemu/hw/ssi/ |
| H A D | xilinx_spi.c | 76 #define R_MAX (0x7C / 4) macro
99 uint32_t regs[R_MAX];
343 "xilinx-spi", R_MAX * 4); in xilinx_spi_realize()
359 VMSTATE_UINT32_ARRAY(regs, XilinxSPI, R_MAX),
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| /qemu/hw/timer/ |
| H A D | xilinx_timer.c | 39 #define R_MAX 4 macro
61 uint32_t regs[R_MAX];
233 R_MAX * 4 * num_timers(t)); in xilinx_timer_realize()
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| /qemu/include/hw/misc/ |
| H A D | xlnx-versal-cfu.h | 196 #define R_MAX (R_CFU_ECO2 + 1) macro
210 uint32_t regs[R_MAX];
211 RegisterInfo regs_info[R_MAX];
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| /qemu/include/hw/char/ |
| H A D | digic-uart.h | 32 R_MAX enumerator
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| /qemu/hw/nvram/ |
| H A D | xlnx-bbram.c | 73 #define R_MAX (R_BBRAM_MSW_LOCK + 1) macro
79 QEMU_BUILD_BUG_ON(R_MAX != ARRAY_SIZE(((XlnxBBRam *)0)->regs));
467 R_MAX * 4); in bbram_ctrl_init()
512 VMSTATE_UINT32_ARRAY(regs, XlnxBBRam, R_MAX),
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| H A D | xlnx-versal-efuse-ctrl.c | 155 #define R_MAX (R_EFUSE_TEST_CTRL + 1) macro
220 QEMU_BUILD_BUG_ON(R_MAX != ARRAY_SIZE(((XlnxVersalEFuseCtrl *)0)->regs));
723 R_MAX * 4); in efuse_ctrl_init()
741 VMSTATE_UINT32_ARRAY(regs, XlnxVersalEFuseCtrl, R_MAX),
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| H A D | xlnx-zynqmp-efuse.c | 197 #define R_MAX (R_PPK1_11 + 1) macro
270 QEMU_BUILD_BUG_ON(R_MAX != ARRAY_SIZE(((XlnxZynqMPEFuse *)0)->regs));
814 R_MAX * 4); in zynqmp_efuse_init()
825 VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPEFuse, R_MAX),
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| /qemu/hw/misc/ |
| H A D | xlnx-versal-trng.c | 122 #define R_MAX (R_SLV_ERR_CTRL + 1) macro
124 QEMU_BUILD_BUG_ON(R_MAX * 4 != sizeof_field(XlnxVersalTRng, regs));
619 R_MAX * 4); in trng_init()
681 VMSTATE_UINT32_ARRAY(regs, XlnxVersalTRng, R_MAX),
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| H A D | xlnx-versal-cfu.c | 349 memory_region_init(&s->iomem, obj, TYPE_XLNX_VERSAL_CFU_APB, R_MAX * 4); in cfu_apb_init()
356 R_MAX * 4); in cfu_apb_init()
468 VMSTATE_UINT32_ARRAY(regs, XlnxVersalCFUAPB, R_MAX),
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| /qemu/hw/dma/ |
| H A D | xilinx_axidma.c | 59 #define R_MAX (0x30 / 4) macro
113 uint32_t regs[R_MAX];
585 "xlnx.axi-dma", R_MAX * 4 * 2); in xilinx_axidma_init()
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