Searched refs:SIFIVE_E_DEV_OTP_CTRL (Results 1 – 2 of 2) sorted by relevance
| /qemu/include/hw/riscv/ | ||
| H A D | sifive_e.h | 66 SIFIVE_E_DEV_OTP_CTRL, enumerator |
| /qemu/hw/riscv/ | ||
| H A D | sifive_e.c | 60 [SIFIVE_E_DEV_OTP_CTRL] = { 0x10010000, 0x1000 }, |