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Searched refs:SIFIVE_E_DEV_UART0 (Results 1 – 2 of 2) sorted by relevance

/qemu/include/hw/riscv/
H A Dsifive_e.h68 SIFIVE_E_DEV_UART0, enumerator
/qemu/hw/riscv/
H A Dsifive_e.c62 [SIFIVE_E_DEV_UART0] = { 0x10013000, 0x1000 },
262 sifive_uart_create(sys_mem, memmap[SIFIVE_E_DEV_UART0].base, in sifive_e_soc_realize()