Searched refs:SPR_MPC_MI_DBRAM0 (Results 1 – 2 of 2) sorted by relevance
/qemu/target/ppc/ | ||
H A D | cpu.h | 2080 #define SPR_MPC_MI_DBRAM0 (0x321) macro |
H A D | cpu_init.c | 1548 spr_register(env, SPR_MPC_MI_DBRAM0, "MI_DBRAM0", in register_8xx_sprs() |