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Searched refs:TCR (Results 1 – 3 of 3) sorted by relevance

/qemu/hw/timer/
H A Drenesas_tmr.c32 REG8(TCR, 0)
33 FIELD(TCR, CCLR, 3, 2)
34 FIELD(TCR, OVIE, 5, 1)
35 FIELD(TCR, CMIEA, 6, 1)
36 FIELD(TCR, CMIEB, 7, 1)
208 ret = FIELD_DP8(ret, TCR, CCLR, in tmr_read()
210 ret = FIELD_DP8(ret, TCR, OVIE, in tmr_read()
212 ret = FIELD_DP8(ret, TCR, CMIEA, in tmr_read()
214 ret = FIELD_DP8(ret, TCR, CMIEB, in tmr_read()
344 if (FIELD_EX8(tmr->tcr[ch], TCR, CMIEA)) { in issue_event()
[all …]
/qemu/hw/ppc/
H A Dtrace-events122 ppc4xx_fit(uint32_t ir, uint64_t tcr, uint64_t tsr) "ir %d TCR 0x%" PRIx64 " TSR 0x%" PRIx64
125 ppc4xx_pit(uint32_t ar, uint32_t ir, uint64_t tcr, uint64_t tsr, uint64_t reload) "ar %d ir %d TCR
126 ppc4xx_wdt(uint64_t tcr, uint64_t tsr) "TCR 0x%" PRIx64 " TSR 0x%" PRIx64
/qemu/hw/display/
H A Dpxa2xx_lcd.c109 #define TCR 0x044 /* TMED Control register */ macro
788 case TCR: in pxa2xx_lcdc_read()
937 case TCR: in pxa2xx_lcdc_write()