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Searched refs:VEXT_VERSION_1_00_0 (Results 1 – 3 of 3) sorted by relevance

/qemu/target/riscv/
H A Dcpu.h107 #define VEXT_VERSION_1_00_0 0x00010000 macro
H A Dcpu.c1351 cpu->env.vext_ver = VEXT_VERSION_1_00_0; in riscv_cpu_init()
1861 cpu_option_add_user_setting(name, VEXT_VERSION_1_00_0); in prop_vext_spec_set()
1862 cpu->env.vext_ver = VEXT_VERSION_1_00_0; in prop_vext_spec_set()
/qemu/target/riscv/tcg/
H A Dtcg-cpu.c1317 env->vext_ver = VEXT_VERSION_1_00_0; in riscv_init_max_cpu_extensions()