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Searched refs:XCHAL_DTLB_SET0_ASID_RESET (Results 1 – 2 of 2) sorted by relevance

/qemu/target/xtensa/core-dsp3400/
H A Dcore-matmap.h274 #define XCHAL_DTLB_SET0_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 other… macro
/qemu/target/xtensa/core-de233_fpu/
H A Dcore-matmap.h466 #define XCHAL_DTLB_SET0_ASID_RESET 0 /* 1 if ASID reset values defined (and all writable); 0 other… macro