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Searched refs:XiveTCTX (Results 1 – 10 of 10) sorted by relevance

/qemu/include/hw/ppc/
H A Dxive.h338 OBJECT_DECLARE_SIMPLE_TYPE(XiveTCTX, XIVE_TCTX)
353 struct XiveTCTX { struct
425 XiveTCTX *tctx;
448 int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
531 void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
533 void xive_tctx_reset(XiveTCTX *tctx);
534 void xive_tctx_destroy(XiveTCTX *tctx);
536 void xive_tctx_reset_os_signal(XiveTCTX *tctx);
544 int kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp);
546 int kvmppc_xive_cpu_get_state(XiveTCTX *tctx, Error **errp);
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H A Dxive2.h78 int xive2_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
106 void xive2_tm_push_os_ctx(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
108 uint64_t xive2_tm_pull_os_ctx(XivePresenter *xptr, XiveTCTX *tctx,
H A Dspapr_cpu_core.h52 struct XiveTCTX *tctx;
/qemu/hw/intc/
H A Dxive.c53 static qemu_irq xive_tctx_output(XiveTCTX *tctx, uint8_t ring) in xive_tctx_output()
68 static uint64_t xive_tctx_accept(XiveTCTX *tctx, uint8_t ring) in xive_tctx_accept()
96 static void xive_tctx_notify(XiveTCTX *tctx, uint8_t ring) in xive_tctx_notify()
118 void xive_tctx_reset_os_signal(XiveTCTX *tctx) in xive_tctx_reset_os_signal()
707 void xive_tctx_reset(XiveTCTX *tctx) in xive_tctx_reset()
728 XiveTCTX *tctx = XIVE_TCTX(dev); in xive_tctx_realize()
759 XiveTCTX *tctx = XIVE_TCTX(opaque); in vmstate_xive_tctx_pre_save()
776 XiveTCTX *tctx = XIVE_TCTX(opaque); in vmstate_xive_tctx_post_load()
802 VMSTATE_BUFFER(regs, XiveTCTX),
832 .instance_size = sizeof(XiveTCTX),
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H A Dxive2.c185 static void xive2_tctx_save_os_ctx(Xive2Router *xrtr, XiveTCTX *tctx, in xive2_tctx_save_os_ctx()
245 uint64_t xive2_tm_pull_os_ctx(XivePresenter *xptr, XiveTCTX *tctx, in xive2_tm_pull_os_ctx()
276 static uint8_t xive2_tctx_restore_os_ctx(Xive2Router *xrtr, XiveTCTX *tctx, in xive2_tctx_restore_os_ctx()
314 static void xive2_tctx_need_resend(Xive2Router *xrtr, XiveTCTX *tctx, in xive2_tctx_need_resend()
362 void xive2_tm_push_os_ctx(XivePresenter *xptr, XiveTCTX *tctx, in xive2_tm_push_os_ctx()
460 static uint32_t xive2_tctx_hw_cam_line(XivePresenter *xptr, XiveTCTX *tctx) in xive2_tctx_hw_cam_line()
476 int xive2_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, in xive2_presenter_tctx_match()
H A Dspapr_xive_kvm.c77 int kvmppc_xive_cpu_set_state(XiveTCTX *tctx, Error **errp) in kvmppc_xive_cpu_set_state()
99 int kvmppc_xive_cpu_get_state(XiveTCTX *tctx, Error **errp) in kvmppc_xive_cpu_get_state()
122 XiveTCTX *tctx;
135 int kvmppc_xive_cpu_synchronize_state(XiveTCTX *tctx, Error **errp) in kvmppc_xive_cpu_synchronize_state()
151 int kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp) in kvmppc_xive_cpu_connect()
H A Dpnv_xive.c491 XiveTCTX *tctx; in pnv_xive_match_nvt()
1574 static XiveTCTX *pnv_xive_get_indirect_tctx(PnvXive *xive) in pnv_xive_get_indirect_tctx()
1604 XiveTCTX *tctx = pnv_xive_get_indirect_tctx(PNV_XIVE(opaque)); in xive_tm_indirect_write()
1612 XiveTCTX *tctx = pnv_xive_get_indirect_tctx(PNV_XIVE(opaque)); in xive_tm_indirect_read()
1636 XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc); in pnv_xive_tm_write()
1645 XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc); in pnv_xive_tm_read()
H A Dspapr_xive.c219 XiveTCTX *tctx = spapr_cpu_state(POWERPC_CPU(current_cpu))->tctx; in spapr_xive_tm_write()
226 XiveTCTX *tctx = spapr_cpu_state(POWERPC_CPU(current_cpu))->tctx; in spapr_xive_tm_read()
442 XiveTCTX *tctx = spapr_cpu_state(cpu)->tctx; in spapr_xive_match_nvt()
655 static void xive_tctx_set_os_cam(XiveTCTX *tctx, uint32_t os_cam) in xive_tctx_set_os_cam()
664 XiveTCTX *tctx = spapr_cpu_state(cpu)->tctx; in spapr_xive_cpu_intc_reset()
H A Dpnv_xive2.c482 XiveTCTX *tctx; in pnv_xive2_match_nvt()
1624 static XiveTCTX *pnv_xive2_get_indirect_tctx(PnvXive2 *xive, uint32_t pir) in pnv_xive2_get_indirect_tctx()
1649 XiveTCTX *tctx; in pnv_xive2_ic_tm_indirect_read()
1669 XiveTCTX *tctx; in pnv_xive2_ic_tm_indirect_write()
1701 XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc); in pnv_xive2_tm_write()
1711 XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc); in pnv_xive2_tm_read()
/qemu/docs/specs/
H A Dppc-xive.rst195 Finally, the XiveTCTX contains the interrupt state context of a thread,