Searched refs:aw (Results 1 – 4 of 4) sorted by relevance
/qemu/hw/i386/ |
H A D | intel_iommu_internal.h | 176 #define VTD_RTADDR_ADDR_MASK(aw) (VTD_HAW_MASK(aw) ^ 0xfffULL) argument 179 #define VTD_IRTA_ADDR_MASK(aw) (VTD_HAW_MASK(aw) ^ 0xfffULL) argument 206 #define VTD_ADDRESS_SIZE(aw) (1ULL << (aw)) argument 207 #define VTD_CAP_MGAW(aw) ((((aw) - 1) & 0x3fULL) << 16) argument 233 #define VTD_IQA_IQA_MASK(aw) (VTD_HAW_MASK(aw) ^ 0xfffULL) argument 418 #define VTD_SPTE_PAGE_L2_RSVD_MASK(aw) \ argument 420 #define VTD_SPTE_PAGE_L3_RSVD_MASK(aw) \ argument 465 #define VTD_ROOT_ENTRY_RSVD(aw) (0xffeULL | ~VTD_HAW_MASK(aw)) argument 479 #define VTD_CONTEXT_ENTRY_RSVD_LO(aw) (0xff0ULL | ~VTD_HAW_MASK(aw)) argument 491 #define VTD_SM_CONTEXT_ENTRY_RSVD_VAL0(aw) (0x1e0ULL | ~VTD_HAW_MASK(aw)) argument [all …]
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H A D | intel_iommu.c | 688 static inline uint64_t vtd_get_slpte_addr(uint64_t slpte, uint8_t aw) in vtd_get_slpte_addr() argument 690 return slpte & VTD_SL_PT_BASE_ADDR_MASK(aw); in vtd_get_slpte_addr() 1015 return 1ULL << MIN(ce_agaw, aw); in vtd_iova_limit() 1021 uint8_t aw, uint32_t pasid) in vtd_iova_range_check() argument 1027 return !(iova & ~(vtd_iova_limit(s, ce, aw, pasid) - 1)); in vtd_iova_range_check() 1190 uint8_t aw; member 1387 if (!vtd_iova_range_check(s, start, ce, info->aw, pasid)) { in vtd_page_walk() 1391 if (!vtd_iova_range_check(s, end, ce, info->aw, pasid)) { in vtd_page_walk() 1393 end = vtd_iova_limit(s, ce, info->aw, pasid); in vtd_page_walk() 1566 .aw = s->aw_bits, in vtd_sync_shadow_page_table_range() [all …]
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/qemu/include/hw/i386/ |
H A D | intel_iommu.h | 49 #define VTD_HAW_MASK(aw) ((1ULL << (aw)) - 1) argument
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/qemu/ |
H A D | qemu-options.hx | 1169 ``aw-bits=39|48`` (default: 39) 1185 ``aw-bits=val`` (val between 32 and 64, default depends on machine)
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