/qemu/tests/qemu-iotests/ |
H A D | 004.out | 4 write before image boundary 8 write into image boundary 11 write at image boundary 14 write past image boundary 17 pwrite past image boundary 20 writev past image boundary 23 read before image boundary 27 read into image boundary 30 read at image boundary 33 read past image boundary [all …]
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H A D | 171.out | 19 write before image boundary 23 write across image boundary 26 write at image boundary 29 write after image boundary 35 read before image boundary 39 read across image boundary 42 read at image boundary 45 read after image boundary 118 write at image boundary 134 read at image boundary [all …]
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H A D | 263.out | 10 == write two 512 byte sectors on a cluster boundary == 29 == write two 512 byte sectors on a cluster boundary ==
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/qemu/hw/net/ |
H A D | ne2000.c | 153 int avail, index, boundary; in ne2000_buffer_full() local 160 boundary = s->boundary << 8; in ne2000_buffer_full() 161 if (index < boundary) in ne2000_buffer_full() 162 avail = boundary - index; in ne2000_buffer_full() 164 avail = (s->stop - s->start) - (index - boundary); in ne2000_buffer_full() 311 s->boundary = val; in ne2000_ioport_write() 380 ret = s->boundary; in ne2000_ioport_read() 614 VMSTATE_UINT8(boundary, NE2000State),
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H A D | ne2000.h | 17 uint8_t boundary; member
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/qemu/target/hexagon/imported/ |
H A D | macros.def | 818 fRNDN, /* Rounding to a boundary */ 824 fCRNDN, /* Rounding to a boundary */ 830 fADD128, /* Rounding to a boundary */ 835 fSUB128, /* Rounding to a boundary */ 840 fSHIFTR128, /* Rounding to a boundary */ 846 fSHIFTL128, /* Rounding to a boundary */ 852 fAND128, /* Rounding to a boundary */ 858 fCAST8S_16S, /* Rounding to a boundary */ 863 fCAST16S_8S, /* Rounding to a boundary */
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/qemu/docs/specs/ |
H A D | ppc-spapr-numa.rst | 58 boundary is the most significant to application performance, followed by 61 that matches the relevancy of the boundary itself. Resources that belongs 62 to the same first boundary will have the shortest distance from each 113 P1 and P2 does not have a common performance boundary. Since this is a one level 114 NUMA configuration, distance between them is one boundary above the first 119 is considered to be on the same performance boundary: 133 P1 and P2 belongs to the same first order boundary. The distance between then
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H A D | rocker.txt | 173 byte boundary. Each descriptor ring will have these registers: 349 Various buffer address and sizes should be tested to verify no address boundary 350 issue exists. In particular, buffers that start on odd-8-byte boundary and/or
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/qemu/host/include/generic/host/ |
H A D | load-extract-al16-al8.h.inc | 17 * cross an 16-byte boundary then the access must be 16-byte atomic,
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/qemu/host/include/loongarch64/host/ |
H A D | load-extract-al16-al8.h.inc | 20 * cross an 16-byte boundary then the access must be 16-byte atomic,
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/qemu/host/include/aarch64/host/ |
H A D | load-extract-al16-al8.h.inc | 20 * cross an 16-byte boundary then the access must be 16-byte atomic,
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/qemu/docs/interop/ |
H A D | qcow2.txt | 72 starts. Must be aligned to a cluster boundary. 76 starts. Must be aligned to a cluster boundary. 86 starts. Must be aligned to a cluster boundary. 332 starts. Must be aligned to a cluster boundary. 346 boundary. 479 boundary. 572 cluster boundary. If the offset is 0 and bit 63 is clear, 583 cluster or sector boundary! If cluster_bits is 678 snapshot starts. Must be aligned to a cluster boundary. 760 a cluster boundary. [all …]
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H A D | parallels.txt | 182 Align header to 8 bytes boundary. 186 The above is followed by padding to the next 8 bytes boundary, then the
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/qemu/host/include/x86_64/host/ |
H A D | load-extract-al16-al8.h.inc | 20 * cross an 16-byte boundary then the access must be 16-byte atomic,
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/qemu/docs/devel/migration/ |
H A D | mapped-ram.rst | 96 | ... | | padding to next 1MB boundary | 106 | RAM_SAVE_FLAG_EOS | | padding to next 1MB boundary |
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/qemu/accel/tcg/ |
H A D | ldst_atomicity.c.inc | 62 * The pair exactly straddles the boundary. 68 * One of the pair crosses the boundary, and is non-atomic. 272 * not cross an 8-byte boundary. This means that we can perform an atomic 296 * boundary, but *does* cross an 8-byte boundary.
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/qemu/docs/system/ |
H A D | gdb.rst | 233 in case of the TCG emulation, which is not considered a security boundary, this
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/qemu/docs/ |
H A D | image-fuzzer.txt | 176 vector (boundary values, e.g. max/min cluster size)
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/qemu/docs/devel/ |
H A D | tcg.rst | 118 * The direct branch cannot cross a page boundary. Memory mappings
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/qemu/hw/scsi/ |
H A D | trace-events | 225 …offset, unsigned desc, uint32_t len) " offset=0x%x is out of a descriptor #%u boundary=0x%"PRIx32
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/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 801 /* Ensure that the prefixed instruction does not cross a 64-byte boundary. */ 2545 * cross a page boundary. The trick is to add the access size-1 2547 * address overflow to the next page if we cross a page boundary,
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/qemu/target/mips/tcg/ |
H A D | micromips_translate.c.inc | 2979 /* make sure instructions are on a halfword boundary */
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H A D | nanomips_translate.c.inc | 4503 /* make sure instructions are on a halfword boundary */
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 1273 * verify that it does not cross a page boundary.
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/qemu/target/s390x/tcg/ |
H A D | translate_vx.c.inc | 753 /* calculate the number of bytes until the next block boundary */
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