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Searched refs:bypass (Results 1 – 20 of 20) sorted by relevance

/qemu/docs/
H A Dbypass-iommu.txt8 is not flexible. We introduce this bypass iommu property to support
22 The bypass iommu feature support PXB host bridge and default main host
29 1. The following is the bypass iommu options:
34 (3) X86 default root bus bypass iommu:
46 - a default host bridge which bypass SMMUv3
48 - a pxb host bridge which bypass SMMUv3
60 - a default host bridge which bypass iommu
62 - a pxb host bridge which bypass iommu
73 The bypass iommu feature includes:
76 space for devices bypass iommu.
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/qemu/hw/virtio/
H A Dvirtio-iommu.c50 bool bypass; member
89 bypassed = s->config.bypass; in virtio_iommu_device_bypassed()
95 bypassed = s->config.bypass; in virtio_iommu_device_bypassed()
355 if (domain->bypass != bypass) { in virtio_iommu_get_domain()
365 domain->bypass = bypass; in virtio_iommu_get_domain()
572 if (domain->bypass) { in virtio_iommu_map()
622 if (domain->bypass) { in virtio_iommu_unmap()
1010 out_config->bypass = dev_config->bypass; in virtio_iommu_get_config()
1028 if (in_config->bypass != dev_config->bypass) { in virtio_iommu_set_config()
1032 } else if (in_config->bypass != 0 && in_config->bypass != 1) { in virtio_iommu_set_config()
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H A Dtrace-events115 …bypass) "page_size_mask=0x%"PRIx64" input range start=0x%"PRIx64" input range end=0x%"PRIx64" doma…
116 virtio_iommu_set_config(uint8_t bypass) "bypass=0x%x"
/qemu/tests/qapi-schema/
H A Dtype-bypass-bad-gen.err1 type-bypass-bad-gen.json: In command 'foo':
2 type-bypass-bad-gen.json:2: flag 'gen' may only use false value
H A Dmeson.build179 'type-bypass-bad-gen.json',
/qemu/hw/block/
H A Dpflash_cfi02.c82 int bypass; member
249 if (pfl->bypass) { in pflash_timer()
516 if (!pfl->bypass && boff != pfl->unlock_addr0) { in pflash_write()
522 pfl->bypass = 1; in pflash_write()
544 if (pfl->bypass) { in pflash_write()
567 if (pfl->bypass) in pflash_write()
571 if (pfl->bypass && cmd == 0x00) { in pflash_write()
700 pfl->bypass = 0; in pflash_write()
/qemu/hw/ppc/
H A Dspapr_vio.c318 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass) in spapr_vio_set_bypass() argument
324 memory_region_set_enabled(&dev->mrbypass, bypass); in spapr_vio_set_bypass()
325 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass); in spapr_vio_set_bypass()
327 dev->tcet->bypass = bypass; in spapr_vio_set_bypass()
H A Dspapr_iommu.c235 spapr_vio_set_bypass(tcet->vdev, tcet->bypass); in spapr_tce_table_post_load()
292 VMSTATE_BOOL(bypass, SpaprTceTable),
/qemu/include/standard-headers/linux/
H A Dvirtio_iommu.h40 uint8_t bypass; member
/qemu/tests/qtest/
H A Dvirtio-iommu-test.c34 uint8_t bypass = qvirtio_config_readb(dev, 36); in pci_config() local
40 g_assert_cmpint(bypass, ==, 1); in pci_config()
/qemu/include/hw/ppc/
H A Dspapr_vio.h151 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass);
H A Dspapr.h877 bool bypass; member
/qemu/hw/arm/
H A Dtrace-events37 …(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x bypass (smmu disabled) io…
38 …st char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x STE bypass iova:0x%"PRIx64" i…
/qemu/docs/system/devices/
H A Dvirtio-pmem.rst13 Virtio pmem allows to bypass the guest page cache and directly use
/qemu/docs/devel/
H A Dacpi-bits.rst18 operating system (the OS). Operating systems tend to bypass bios problems and
/qemu/docs/system/riscv/
H A Dsifive_u.rst333 This changes U-Boot to use the QEMU generated device tree blob, and bypass
/qemu/hw/net/
H A Dtrace-events135 …check, bool speed_select_bypass) "Set extended link params: ASD check: %d, Speed select bypass: %d"
279 …ass, bool pfrstd) "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done…
/qemu/target/s390x/
H A Dcpu_features_def.h.inc140 DEF_FEAT(SIE_IB, "ib", SCLP_CPU, 42, "SIE: Intervention bypass facility")
/qemu/docs/tools/
H A Dqemu-img.rst914 that bypass the qcow2 metadata may corrupt the qcow2 metadata because the
/qemu/qapi/
H A Dblock-core.json3162 # @direct: enables use of O_DIRECT (bypass the host page cache;