Searched refs:c9_insn (Results 1 – 2 of 2) sorted by relevance
| /qemu/target/arm/ | ||
| H A D | cpu.h | 384 uint32_t c9_insn; /* Cache lockdown registers. */ member |
| H A D | helper.c | 718 .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c9_insn), |