/qemu/tests/qemu-iotests/ |
H A D | 137.out | 25 qemu-io: Conflicting values for qcow2 options 'overlap-check' ('constant') and 'overlap-check.templ… 26 …bb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all 27 …bb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all 35 …bb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all
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/qemu/scripts/coccinelle/ |
H A D | exec_rw_const.cocci | 52 // Avoid uses of address_space_rw() with a constant is_write argument. 65 // Avoid uses of cpu_physical_memory_rw() with a constant is_write argument.
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H A D | tcg_gen_extract.cocci | 43 constant ofs, msk; 88 constant match.ofs, match.msk;
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/qemu/docs/devel/ |
H A D | tcg-ops.rst | 51 variable operands, input variable operands and constant operands. 57 input operands, followed by constant operands. The output type is 87 A TCG *constant* is a variable which is live throughout the entire 88 translation block, and contains a constant value. These variables 566 *offset* must be a constant. 736 - | Similarly, for a constant. 868 a constant (e.g. addi for add, movi for mov). 926 A target can define specific register or constant constraints. If an 927 operation uses a constant input constraint which does not allow all 929 The constraint '``i``' is defined generically to accept any constant. [all …]
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H A D | tcg.rst | 78 that has been assumed constant and is required by the main loop to 115 * The change in CPU state must be constant, e.g., a direct branch and
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H A D | style.rst | 225 When comparing a variable for (in)equality with a constant, list the 226 constant on the right, as in: 237 even when the constant is on the right. 317 achieved by making it easy for the compiler to constant fold or using
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H A D | decodetree.rst | 178 A *const_elt* allows a argument to be set to a constant value. This may
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H A D | fuzzing.rst | 78 the fuzzer's input and Arg2 is a magic constant, then each time the Hamming
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/qemu/tests/tcg/cris/bare/ |
H A D | check_movscr.s | 4 ; Move constant byte, word, dword to register. Check that sign-extension
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H A D | check_movucr.s | 4 ; Move constant byte, word, dword to register. Check that zero-extension
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H A D | check_movecr.s | 4 ; Move constant byte, word, dword to register. Check that no extension is
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/qemu/tcg/sparc64/ |
H A D | tcg-target.c.inc | 324 /* test if a constant matches the constraint */ 393 /* A 13-bit constant sign-extended to 64 bits. */ 399 /* A 32-bit constant sign-extended to 64 bits. */ 406 /* A 32-bit constant zero-extended to 64 bits. */ 422 /* A 13-bit constant sign-extended to 64-bits. */ 434 /* A 13-bit constant relative to the TB. */ 443 /* A 32-bit constant sign-extended to 64-bits. */ 449 /* A 32-bit constant, shifted. */ 462 /* Use the constant pool, if possible. */ 470 /* A 64-bit constant decomposed into 2 32-bit pieces. */ [all …]
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/qemu/include/standard-headers/linux/ |
H A D | input.h | 459 struct ff_constant_effect constant; member
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/qemu/tests/tcg/hexagon/ |
H A D | Makefile.target | 122 hvx_histogram: CFLAGS += -mhvx -Wno-gnu-folding-constant
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/qemu/target/arm/tcg/ |
H A D | neon-shared.decode | 38 # which is 0 for fp16 and 1 for fp32 into a MO_* constant.
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/qemu/tcg/ |
H A D | tcg-pool.c.inc | 2 * TCG Backend Data: constant pool.
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/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 147 /* test if a constant matches the constraint */ 166 * Used for subtraction, where a constant must be handled by ADDI. 174 * and requires the modified constant to be representable. 572 /* Drop into the constant pool. */ 733 /* If we have a negative constant such that negating it would 842 * If we have a constant input, the most efficient way to implement 844 * We don't need to care for this for LE because the constant input
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/qemu/target/tricore/ |
H A D | translate.c | 2898 int r2 , int32_t constant , int32_t offset) in gen_compute_branch() argument 2925 gen_branch_condi(ctx, TCG_COND_EQ, cpu_gpr_d[15], constant, in gen_compute_branch() 2933 constant, offset + 16); in gen_compute_branch() 2938 tcg_gen_andi_tl(temp, cpu_gpr_d[15], 0x1u << constant); in gen_compute_branch() 2943 tcg_gen_andi_tl(temp, cpu_gpr_d[15], 0x1u << constant); in gen_compute_branch() 3035 constant = MASK_OP_BRC_CONST4(ctx->opcode); in gen_compute_branch() 3036 gen_branch_condi(ctx, TCG_COND_GEU, cpu_gpr_d[r1], constant, in gen_compute_branch() 3044 constant = MASK_OP_BRC_CONST4(ctx->opcode); in gen_compute_branch() 3045 gen_branch_condi(ctx, TCG_COND_LTU, cpu_gpr_d[r1], constant, in gen_compute_branch() 3055 gen_branch_condi(ctx, TCG_COND_NE, temp, constant, offset); in gen_compute_branch() [all …]
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/qemu/target/hexagon/ |
H A D | attribs_def.h.inc | 127 DEF_ATTRIB(IT_EXTENDER, "constant extender instruction", "", "")
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/qemu/include/hw/arm/ |
H A D | omap.h | 518 constant = 0, enumerator
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/qemu/tcg/loongarch64/ |
H A D | tcg-target.c.inc | 185 /* test if a constant matches the constraint */ 571 * If we have a constant input, the most efficient way to implement 573 * We don't need to care for this for LE because the constant input 2182 * can express using andi/ori if ~constant satisfies
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/qemu/docs/ |
H A D | qcow2-cache.txt | 24 A qcow2 file is organized in units of constant size called clusters.
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 190 /* test if a constant matches the constraint */ 629 /* Otherwise, put 64-bit constants into the constant pool. */ 832 /* If we have a negative constant such that negating it would 1099 * For n64, always drop the pointer into the constant pool.
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/qemu/linux-user/ |
H A D | syscall_defs.h | 283 abi_long constant; /* PLL (phase-locked loop) time constant */ member 313 abi_llong constant; /* PLL (phase-locked loop) time constant */ member
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/qemu/target/hexagon/idef-parser/ |
H A D | README.rst | 169 value in case of an immediate constant, and decorates the token with the 277 operations in C instead of tinycode generators, thus effectively constant
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