/qemu/hw/core/ |
H A D | machine-smp.c | 96 unsigned cores = config->has_cores ? config->cores : 0; in machine_parse_smp_config() local 112 (config->has_cores && config->cores == 0) || in machine_parse_smp_config() 167 cores = cores > 0 ? cores : 1; in machine_parse_smp_config() 175 cores = cores > 0 ? cores : 1; in machine_parse_smp_config() 179 modules * cores * threads); in machine_parse_smp_config() 180 } else if (cores == 0) { in machine_parse_smp_config() 182 cores = maxcpus / in machine_parse_smp_config() 188 if (cores == 0) { in machine_parse_smp_config() 191 cores = maxcpus / in machine_parse_smp_config() 206 clusters * modules * cores); in machine_parse_smp_config() [all …]
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/qemu/tests/qtest/ |
H A D | cpu-plug-test.c | 21 unsigned cores; member 40 td->sockets, td->cores, td->threads, td->maxcpus); in test_plug_with_device_add() 95 data->cores = 3; in add_pc_test_case() 97 data->maxcpus = data->sockets * data->cores * data->threads; in add_pc_test_case() 100 mname, data->sockets, data->cores, in add_pc_test_case() 121 data->cores = 3; in add_pseries_test_case() 123 data->maxcpus = data->sockets * data->cores * data->threads; in add_pseries_test_case() 126 mname, data->sockets, data->cores, in add_pseries_test_case() 147 data->cores = 3; in add_s390x_test_case() 149 data->maxcpus = data->sockets * data->cores * data->threads; in add_s390x_test_case() [all …]
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/qemu/docs/system/arm/ |
H A D | raspi.rst | 10 Cortex-A7 (4 cores), 1 GiB of RAM 12 Cortex-A53 (4 cores), 512 MiB of RAM 14 Cortex-A53 (4 cores), 1 GiB of RAM 16 Cortex-A72 (4 cores), 2 GiB of RAM
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H A D | highbank.rst | 5 which has four Cortex-A9 cores. 8 which has four Cortex-A15 cores.
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H A D | nuvoton.rst | 6 servers. They all feature one or two ARM Cortex-A9 CPU cores, as well as an 13 The NPCM750 SoC has two Cortex-A9 cores and is targeted for the Enterprise 18 The NPCM730 SoC has two Cortex-A9 cores and is targeted for Data Center and
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/qemu/contrib/plugins/ |
H A D | cache.c | 98 static int cores; variable 294 caches = g_new(Cache *, cores); in caches_init() 296 for (i = 0; i < cores; i++) { in caches_init() 403 cache_idx = vcpu_index % cores; in vcpu_mem_access() 439 cache_idx = vcpu_index % cores; in vcpu_insn_exec() 533 for (i = 0; i < cores; i++) { in caches_free() 571 g_assert(cores > 1); in sum_stats() 572 for (i = 0; i < cores; i++) { in sum_stats() 624 for (i = 0; i < cores; i++) { in log_stats() 635 if (cores > 1) { in log_stats() [all …]
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/qemu/include/hw/s390x/ |
H A D | cpu-topology.h | 68 return (n / smp->cores) % smp->sockets; in s390_std_socket() 73 return (n / (smp->cores * smp->sockets)) % smp->books; in s390_std_book() 78 return (n / (smp->cores * smp->sockets * smp->books)) % smp->drawers; in s390_std_drawer()
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/qemu/docs/system/ppc/ |
H A D | powernv.rst | 77 $ qemu-system-ppc64 -m 2G -machine powernv9 -smp 2,cores=2,threads=1 \ 114 $ qemu-system-ppc64 -m 2G -machine powernv9 -smp 2,cores=2,threads=1 -accel tcg,thread=single \ 149 number of cores. ``-smp 2,cores=1`` will define a machine with 2 150 sockets of 1 core, whereas ``-smp 2,cores=2`` will define a machine 151 with 1 socket of 2 cores. ``-smp 8,cores=2``, 4 sockets of 2 cores.
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/qemu/docs/system/s390x/ |
H A D | cpu-topology.rst | 67 -smp cpus=5,drawer=1,books=1,sockets=8,cores=4,maxcpus=32 73 -smp cpus=5,sockets=8,cores=4,maxcpus=32 133 In the following machine we define 8 sockets with 4 cores each. 139 -smp cpus=5,sockets=8,cores=4,maxcpus=32 \ 155 As we have 4 cores in a socket, we have 4 CPUs provided 223 For example, here we set the position of the cores 1,2,3 to 224 drawer 1, book 1, socket 2 and cores 0,9 and 14 to drawer 0, 234 -smp cpus=1,sockets=8,cores=4,maxcpus=32 \
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/qemu/target/xtensa/ |
H A D | import_core.sh | 69 grep -qxf core-${NAME}.c "$BASE"/cores.list || \ 70 echo core-${NAME}.c >> "$BASE"/cores.list
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H A D | meson.build | 3 xtensa_cores = fs.read('cores.list')
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/qemu/tests/unit/ |
H A D | test-smp-parse.c | 36 .has_cores = hc, .cores = c, \ 45 .cores = c, \ 59 .has_cores = hd, .cores = d, \ 73 .has_cores = hd, .cores = d, \ 89 .has_cores = he, .cores = e, \ 107 .has_cores = true, .cores = g, \ 640 config->has_cores ? "true" : "false", config->cores, in smp_config_to_string() 689 topo->cores, topo->threads, topo->max_cpus, in cpu_topology_to_string() 733 (ms->smp.cores == expect_topo->cores) && in check_parse()
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/qemu/target/s390x/kvm/ |
H A D | stsi-topology.c | 146 sysib->mag[S390_TOPOLOGY_MAG1] = current_machine->smp.cores; in setup_stsi() 152 sysib->mag[S390_TOPOLOGY_MAG1] = current_machine->smp.cores; in setup_stsi() 158 sysib->mag[S390_TOPOLOGY_MAG1] = current_machine->smp.cores; in setup_stsi()
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/qemu/target/riscv/ |
H A D | XVentanaCondOps.decode | 9 # Custom ISA extensions for Ventana Micro Systems RISC-V cores
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/qemu/hw/s390x/ |
H A D | cpu-topology.c | 343 if (s390_topology.cores_per_socket[entry] >= ms->smp.cores) { in s390_topology_setup_cpu() 415 ms->smp.cores) { in s390_change_topology()
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/qemu/tests/docker/dockerfiles/ |
H A D | debian-xtensa-cross.docker | 5 # using a prebuilt toolchains for Xtensa cores from:
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/qemu/hw/ppc/ |
H A D | pnv.c | 325 PnvCore *pnv_core = chip->cores[i]; in pnv_chip_power8_dt_populate() 382 PnvCore *pnv_core = chip->cores[i]; in pnv_chip_power9_dt_populate() 443 PnvCore *pnv_core = chip->cores[i]; in pnv_chip_power10_dt_populate() 1019 object_property_set_int(chip, "nr-cores", machine->smp.cores, in pnv_init() 1345 PnvCore *pnv_core = chip->cores[i]; in pnv_chip_icp_realize() 1589 pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4], in pnv_chip_quad_realize() 1845 pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4], in pnv_chip_power10_quad_realize() 2164 chip->cores = g_new0(PnvCore *, chip->nr_cores); in pnv_chip_core_realize() 2180 chip->cores[i] = pnv_core; in pnv_chip_core_realize() 2240 PnvCore *pc = chip->cores[i]; in pnv_chip_find_core() [all …]
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/qemu/docs/system/riscv/ |
H A D | sifive_u.rst | 13 * Up to 4 U54 / U34 cores 31 With QEMU, one can create a machine with 1 E51 core and up to 4 U54 cores. It 33 that the RISC-V cores are replaced by the 32-bit ones (E31 and U34), to help 309 U-Boot proper. Hence the number of cores and size of memory have to match 310 the real hardware, ie: 5 cores (-smp 5) and 8 GiB memory (-m 8G).
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H A D | microchip-icicle-kit.rst | 5 SiFive's E51 plus four U54 cores and many on-chip peripherals and an FPGA. 19 * 4 U54 cores
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H A D | shakti-c.rst | 11 https://gitlab.com/shaktiproject/cores/shakti-soc/-/blob/master/fpga/boards/artya7-100t/c-class/REA…
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/qemu/docs/system/ |
H A D | target-avr.rst | 7 These can have one of the following cores: avr1, avr2, avr25, avr3, avr31,
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/qemu/include/hw/ppc/ |
H A D | pnv_chip.h | 32 PnvCore **cores; member
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/qemu/hw/loongarch/ |
H A D | virt.c | 361 num / (ms->smp.cores * ms->smp.threads), in fdt_add_cpu_nodes() 362 (num / ms->smp.threads) % ms->smp.cores, in fdt_add_cpu_nodes() 367 num / ms->smp.cores, in fdt_add_cpu_nodes() 368 num % ms->smp.cores); in fdt_add_cpu_nodes() 1354 n / (ms->smp.cores * ms->smp.threads); in virt_possible_cpu_arch_ids() 1357 n / ms->smp.threads % ms->smp.cores; in virt_possible_cpu_arch_ids()
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/qemu/tests/vm/ |
H A D | conf_example_aarch64.yml | 26 qemu_args: "-smp cpus=16,sockets=2,cores=8
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H A D | conf_example_x86.yml | 27 qemu_args: "-smp cpus=8,sockets=2,cores=4
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