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Searched refs:cpus (Results 1 – 25 of 133) sorted by relevance

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/qemu/tests/avocado/
H A Dx86_cpu_model_versions.py33 def validate_aliases(self, cpus): argument
34 for c in cpus.values():
46 def validate_variant_aliases(self, cpus): argument
87 cpus = dict((m['name'], m) for m in
104 self.validate_variant_aliases(cpus)
107 for name,c in cpus.items():
119 cpus = dict((m['name'], m) for m in
137 self.validate_variant_aliases(cpus)
215 self.validate_aliases(cpus)
226 cpus = dict((m['name'], m) for m in
[all …]
H A Dcpu_queries.py26 cpus = self.vm.cmd('query-cpu-definitions')
27 for c in cpus:
31 for c in cpus:
/qemu/hw/riscv/
H A Dnuma.c40 int i, first_hartid = ms->smp.cpus; in riscv_socket_first_hartid()
46 for (i = 0; i < ms->smp.cpus; i++) { in riscv_socket_first_hartid()
63 return (!socket_id) ? ms->smp.cpus - 1 : -1; in riscv_socket_last_hartid()
66 for (i = 0; i < ms->smp.cpus; i++) { in riscv_socket_last_hartid()
75 return (last_hartid < ms->smp.cpus) ? last_hartid : -1; in riscv_socket_last_hartid()
83 return (!socket_id) ? ms->smp.cpus : -1; in riscv_socket_hart_count()
203 return possible_cpus->cpus[cpu_index].props; in riscv_numa_cpu_index_to_props()
210 if (ms->numa_state->num_nodes > ms->smp.cpus) { in riscv_numa_get_default_cpu_node_id()
240 ms->possible_cpus->cpus[n].type = ms->cpu_type; in riscv_numa_possible_cpu_arch_ids()
241 ms->possible_cpus->cpus[n].arch_id = n; in riscv_numa_possible_cpu_arch_ids()
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H A Dsifive_e.c118 riscv_load_kernel(machine, &s->soc.cpus, in sifive_e_machine_init()
183 object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); in type_init()
184 object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, in type_init()
186 object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x1004, &error_abort); in type_init()
200 object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, in sifive_e_soc_realize()
202 sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); in sifive_e_soc_realize()
212 (char *)SIFIVE_E_PLIC_HART_CONFIG, ms->smp.cpus, 0, in sifive_e_soc_realize()
223 0, ms->smp.cpus, false); in sifive_e_soc_realize()
226 RISCV_ACLINT_DEFAULT_MTIMER_SIZE, 0, ms->smp.cpus, in sifive_e_soc_realize()
H A Dshakti_c.c60 riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus, in shakti_c_machine_state_init()
110 sysbus_realize(SYS_BUS_DEVICE(&sss->cpus), &error_abort); in type_init()
113 (char *)SHAKTI_C_PLIC_HART_CONFIG, ms->smp.cpus, 0, in type_init()
163 object_initialize_child(obj, "cpus", &sss->cpus, TYPE_RISCV_HART_ARRAY); in shakti_c_soc_instance_init()
171 object_property_set_str(OBJECT(&sss->cpus), "cpu-type", in shakti_c_soc_instance_init()
173 object_property_set_int(OBJECT(&sss->cpus), "num-harts", 1, in shakti_c_soc_instance_init()
H A Dopentitan.c105 riscv_load_kernel(machine, &s->soc.cpus, in opentitan_machine_init()
127 object_initialize_child(obj, "cpus", &s->cpus, TYPE_RISCV_HART_ARRAY); in lowrisc_ibex_soc_init()
151 object_property_set_str(OBJECT(&s->cpus), "cpu-type", ms->cpu_type, in lowrisc_ibex_soc_realize()
153 object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus, in lowrisc_ibex_soc_realize()
155 object_property_set_int(OBJECT(&s->cpus), "resetvec", s->resetvec, in lowrisc_ibex_soc_realize()
157 sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_fatal); in lowrisc_ibex_soc_realize()
192 for (i = 0; i < ms->smp.cpus; i++) { in lowrisc_ibex_soc_realize()
195 qdev_connect_gpio_out(DEVICE(&s->plic), ms->smp.cpus + i, in lowrisc_ibex_soc_realize()
/qemu/hw/alpha/
H A Ddp264.c53 AlphaCPU *cpus[4]; in clipper_init() local
64 unsigned int smp_cpus = machine->smp.cpus; in clipper_init()
67 memset(cpus, 0, sizeof(cpus)); in clipper_init()
69 cpus[i] = ALPHA_CPU(cpu_create(machine->cpu_type)); in clipper_init()
82 cpus[0]->env.trap_arg0 = ram_size; in clipper_init()
83 cpus[0]->env.trap_arg1 = 0; in clipper_init()
84 cpus[0]->env.trap_arg2 = smp_cpus | (!machine->enable_graphics << 6); in clipper_init()
90 pci_bus = typhoon_init(machine->ram, &isa_irq, &rtc_irq, cpus, in clipper_init()
156 cpus[i]->env.pc = palcode_entry; in clipper_init()
157 cpus[i]->env.palbr = palcode_entry; in clipper_init()
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/qemu/hw/openrisc/
H A Dopenrisc_sim.c172 int num_cpus, OpenRISCCPU *cpus[], in openrisc_sim_net_init() argument
197 sysbus_connect_irq(s, 0, get_cpu_irq(cpus, 0, irq_pin)); in openrisc_sim_net_init()
230 sysbus_connect_irq(s, i, get_cpu_irq(cpus, i, irq_pin)); in openrisc_sim_ompic_init()
265 serial_irq = get_cpu_irq(cpus, 0, irq_pin); in openrisc_sim_serial_init()
291 OpenRISCCPU *cpus[OR1KSIM_CPUS_MAX] = {}; in openrisc_sim_init() local
296 unsigned int smp_cpus = machine->smp.cpus; in openrisc_sim_init()
300 cpus[n] = OPENRISC_CPU(cpu_create(machine->cpu_type)); in openrisc_sim_init()
301 if (cpus[n] == NULL) { in openrisc_sim_init()
306 cpu_openrisc_clock_init(cpus[n]); in openrisc_sim_init()
308 qemu_register_reset(main_cpu_reset, cpus[n]); in openrisc_sim_init()
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H A Dvirt.c121 return get_cpu_irq(cpus, 0, irq_pin); in get_per_cpu_irq()
215 sysbus_connect_irq(s, i, get_cpu_irq(cpus, i, irq_pin)); in openrisc_virt_ompic_init()
300 qemu_irq rtc_irq = get_per_cpu_irq(cpus, num_cpus, irq_pin); in openrisc_virt_rtc_init()
474 OpenRISCCPU *cpus[VIRT_CPUS_MAX] = {}; in openrisc_virt_init() local
479 unsigned int smp_cpus = machine->smp.cpus; in openrisc_virt_init()
484 cpus[n] = OPENRISC_CPU(cpu_create(machine->cpu_type)); in openrisc_virt_init()
485 if (cpus[n] == NULL) { in openrisc_virt_init()
490 cpu_openrisc_clock_init(cpus[n]); in openrisc_virt_init()
492 qemu_register_reset(main_cpu_reset, cpus[n]); in openrisc_virt_init()
510 smp_cpus, cpus, VIRT_UART_IRQ); in openrisc_virt_init()
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/qemu/tests/qtest/
H A Dnuma-test.c85 QList *cpus; in test_query_cpus() local
93 cpus = get_cpus(qts, &resp); in test_query_cpus()
94 g_assert(cpus); in test_query_cpus()
123 QList *cpus; in pc_numa_cpu() local
136 g_assert(cpus); in pc_numa_cpu()
176 QList *cpus; in spapr_numa_cpu() local
189 g_assert(cpus); in spapr_numa_cpu()
221 QList *cpus; in aarch64_numa_cpu() local
233 g_assert(cpus); in aarch64_numa_cpu()
272 QList *cpus; in pc_dynamic_cpu_cfg() local
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H A Dcpu-plug-test.c33 QList *cpus; in test_plug_with_device_add() local
45 cpus = qdict_get_qlist(resp, "return"); in test_plug_with_device_add()
46 g_assert(cpus); in test_plug_with_device_add()
48 while ((e = qlist_pop(cpus))) { in test_plug_with_device_add()
/qemu/hw/core/
H A Dmachine-smp.c89 unsigned cpus = config->has_cpus ? config->cpus : 0; in machine_parse_smp_config() local
105 if ((config->has_cpus && config->cpus == 0) || in machine_parse_smp_config()
165 if (cpus == 0 && maxcpus == 0) { in machine_parse_smp_config()
170 maxcpus = maxcpus > 0 ? maxcpus : cpus; in machine_parse_smp_config()
213 cpus = cpus > 0 ? cpus : maxcpus; in machine_parse_smp_config()
215 ms->smp.cpus = cpus; in machine_parse_smp_config()
238 if (maxcpus < cpus) { in machine_parse_smp_config()
243 topo_msg, maxcpus, cpus); in machine_parse_smp_config()
247 if (ms->smp.cpus < mc->min_cpus) { in machine_parse_smp_config()
250 ms->smp.cpus, in machine_parse_smp_config()
H A Dmachine.c891 .has_cpus = true, .cpus = ms->smp.cpus, in machine_get_smp()
1167 ms->smp.cpus = mc->default_cpus; in machine_initfn()
1347 const CPUArchId *cpus = possible_cpus->cpus; in validate_cpu_cluster_to_numa_boundary() local
1361 if (cpus[i].props.has_socket_id && in validate_cpu_cluster_to_numa_boundary()
1363 cpus[i].props.has_node_id && in validate_cpu_cluster_to_numa_boundary()
1364 cpus[j].props.has_socket_id && in validate_cpu_cluster_to_numa_boundary()
1366 cpus[j].props.has_node_id && in validate_cpu_cluster_to_numa_boundary()
1367 cpus[i].props.socket_id == cpus[j].props.socket_id && in validate_cpu_cluster_to_numa_boundary()
1368 cpus[i].props.cluster_id == cpus[j].props.cluster_id && in validate_cpu_cluster_to_numa_boundary()
1369 cpus[i].props.node_id != cpus[j].props.node_id) { in validate_cpu_cluster_to_numa_boundary()
[all …]
/qemu/hw/intc/
H A Dompic.c52 OR1KOMPICCPUState cpus[OMPIC_MAX_CPUS]; member
64 return s->cpus[src_cpu].control; in ompic_read()
66 return s->cpus[src_cpu].status; in ompic_read()
78 s->cpus[src_cpu].control = data; in ompic_write()
83 s->cpus[dst_cpu].status = OMPIC_STATUS_IRQ_PENDING | in ompic_write()
87 qemu_irq_raise(s->cpus[dst_cpu].irq); in ompic_write()
90 s->cpus[src_cpu].status &= ~OMPIC_STATUS_IRQ_PENDING; in ompic_write()
91 qemu_irq_lower(s->cpus[src_cpu].irq); in ompic_write()
127 sysbus_init_irq(sbd, &s->cpus[i].irq); in or1k_ompic_realize()
152 VMSTATE_STRUCT_ARRAY(cpus, OR1KOMPICState, OMPIC_MAX_CPUS, 1,
/qemu/hw/i386/
H A Dx86.c84 return possible_cpus->cpus[cpu_index].props; in x86_cpu_index_to_props()
96 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, in x86_get_default_cpu_node_id()
126 ms->possible_cpus->cpus[i].type = ms->cpu_type; in x86_possible_cpu_arch_ids()
127 ms->possible_cpus->cpus[i].vcpus_count = 1; in x86_possible_cpu_arch_ids()
128 ms->possible_cpus->cpus[i].arch_id = in x86_possible_cpu_arch_ids()
130 x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, in x86_possible_cpu_arch_ids()
132 ms->possible_cpus->cpus[i].props.has_socket_id = true; in x86_possible_cpu_arch_ids()
135 ms->possible_cpus->cpus[i].props.has_die_id = true; in x86_possible_cpu_arch_ids()
139 ms->possible_cpus->cpus[i].props.has_module_id = true; in x86_possible_cpu_arch_ids()
142 ms->possible_cpus->cpus[i].props.has_core_id = true; in x86_possible_cpu_arch_ids()
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H A Dfw_cfg.c62 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); in fw_cfg_build_smbios()
115 const CPUArchIdList *cpus = mc->possible_cpu_arch_ids(ms); in fw_cfg_arch_create() local
152 for (i = 0; i < cpus->len; i++) { in fw_cfg_arch_create()
153 unsigned int apic_id = cpus->cpus[i].arch_id; in fw_cfg_arch_create()
155 numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id); in fw_cfg_arch_create()
170 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu); in fw_cfg_build_feature_control()
/qemu/tests/unit/
H A Dtest-smp-parse.c687 topo->cpus, topo->drawers, topo->books, in cpu_topology_to_string()
727 (ms->smp.cpus == expect_topo->cpus) && in check_parse()
961 data.config.cpus *= num_dies; in test_with_dies()
968 data.expect_prefer_sockets.cpus *= num_dies; in test_with_dies()
971 data.expect_prefer_cores.cpus *= num_dies; in test_with_dies()
1011 data.config.cpus *= num_clusters; in test_with_clusters()
1061 data.config.cpus *= num_books; in test_with_books()
1071 data.expect_prefer_cores.cpus *= num_books; in test_with_books()
1111 data.config.cpus *= num_drawers; in test_with_drawers()
1239 data.config.cpus *= multiplier; in test_full_topo()
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/qemu/tests/vm/
H A Dconf_example_aarch64.yml26 qemu_args: "-smp cpus=16,sockets=2,cores=8
27 -numa node,cpus=0-3,nodeid=0 -numa node,cpus=4-7,nodeid=1
28 -numa node,cpus=8-11,nodeid=2 -numa node,cpus=12-15,nodeid=3
H A Dconf_example_x86.yml27 qemu_args: "-smp cpus=8,sockets=2,cores=4
32 -numa node,cpus=0-1,nodeid=0 -numa node,cpus=2-3,nodeid=1
33 -numa node,cpus=4-5,nodeid=2 -numa node,cpus=6-7,nodeid=3
/qemu/docs/system/
H A Dcpu-hotplug.rst28 (QEMU) query-hotpluggable-cpus
30 "execute": "query-hotpluggable-cpus",
58 (4) The ``query-hotpluggable-cpus`` command returns an object for CPUs
81 (5) Optionally, run QMP ``query-cpus-fast`` for some details about the
84 (QEMU) query-cpus-fast
86 "execute": "query-cpus-fast",
/qemu/hw/acpi/
H A Dcpu_hotplug.c29 AcpiCpuHotplug *cpus = opaque; in cpu_status_read() local
30 uint64_t val = cpus->sts[addr]; in cpu_status_read()
43 AcpiCpuHotplug *cpus = opaque; in cpu_status_write() local
44 object_property_set_bool(cpus->device, "cpu-hotplug-legacy", false, in cpu_status_write()
280 int cpu_apic_id = apic_ids->cpus[i].arch_id; in build_legacy_cpu_hotplug_aml()
314 int cpu_apic_id = apic_ids->cpus[i].arch_id; in build_legacy_cpu_hotplug_aml()
335 int cpu_apic_id = apic_ids->cpus[i].arch_id; in build_legacy_cpu_hotplug_aml()
340 aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0)); in build_legacy_cpu_hotplug_aml()
/qemu/hw/loongarch/
H A Dvirt.c298 int smp_cpus = ms->smp.cpus; in fdt_add_cpu_nodes()
743 qdev_prop_set_uint32(ipi, "num-cpu", ms->smp.cpus); in virt_irq_init()
755 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in virt_irq_init()
769 qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); in virt_irq_init()
778 for (cpu = 0; cpu < ms->smp.cpus; cpu++) { in virt_irq_init()
1010 machine->possible_cpus->cpus[i].cpu = cpu; in virt_init()
1236 ms->possible_cpus->cpus[n].type = ms->cpu_type; in virt_possible_cpu_arch_ids()
1237 ms->possible_cpus->cpus[n].arch_id = n; in virt_possible_cpu_arch_ids()
1240 ms->possible_cpus->cpus[n].props.socket_id = in virt_possible_cpu_arch_ids()
1243 ms->possible_cpus->cpus[n].props.core_id = in virt_possible_cpu_arch_ids()
[all …]
/qemu/hw/arm/
H A Dsbsa-ref.c275 if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { in create_fdt()
277 ms->possible_cpus->cpus[cs->cpu_index].props.node_id); in create_fdt()
431 unsigned int smp_cpus = MACHINE(sms)->smp.cpus; in create_gic()
710 unsigned int smp_cpus = machine->smp.cpus; in sbsa_ref_init()
768 cpuobj = object_new(possible_cpus->cpus[n].type); in sbsa_ref_init()
770 possible_cpus->cpus[n].arch_id, NULL); in sbsa_ref_init()
847 ms->possible_cpus->cpus[n].type = ms->cpu_type; in sbsa_ref_possible_cpu_arch_ids()
848 ms->possible_cpus->cpus[n].arch_id = in sbsa_ref_possible_cpu_arch_ids()
850 ms->possible_cpus->cpus[n].props.has_thread_id = true; in sbsa_ref_possible_cpu_arch_ids()
851 ms->possible_cpus->cpus[n].props.thread_id = n; in sbsa_ref_possible_cpu_arch_ids()
[all …]
H A Dmps3r.c270 qdev_prop_set_uint32(gicdev, "num-cpu", machine->smp.cpus); in create_gic()
273 qlist_append_int(redist_region_count, machine->smp.cpus); in create_gic()
285 for (int i = 0; i < machine->smp.cpus; i++) { in create_gic()
317 sysbus_connect_irq(gicsbd, i + machine->smp.cpus, in create_gic()
319 sysbus_connect_irq(gicsbd, i + 2 * machine->smp.cpus, in create_gic()
321 sysbus_connect_irq(gicsbd, i + 3 * machine->smp.cpus, in create_gic()
370 assert(machine->smp.cpus <= MPS3R_CPU_MAX); in mps3r_common_init()
371 for (int i = 0; i < machine->smp.cpus; i++) { in mps3r_common_init()
412 for (int i = 0; i < machine->smp.cpus; i++) { in mps3r_common_init()
/qemu/contrib/plugins/
H A Dexeclog.c34 static GArray *cpus; variable
48 c = &g_array_index(cpus, CPU, vcpu_index); in get_cpu()
384 if (vcpu_index >= cpus->len) { in vcpu_init()
385 g_array_set_size(cpus, vcpu_index + 1); in vcpu_init()
401 for (i = 0; i < cpus->len; i++) { in plugin_exit()
453 cpus = g_array_sized_new(true, true, sizeof(CPU), in qemu_plugin_install()

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