/qemu/tests/qemu-iotests/ |
H A D | 148 | 91 delay = 10 95 self.vm.qtest("clock_step %d" % delay) 103 delay = 2 * event_rate 107 self.vm.qtest("clock_step %d" % delay) 111 delay = 10 115 self.vm.qtest("clock_step %d" % delay) 123 delay = 2 * event_rate 127 self.vm.qtest("clock_step %d" % delay)
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/qemu/tests/tcg/multiarch/ |
H A D | threadcount.c | 25 int delay; member 31 usleep(arg->delay); in thread_fn() 48 arg->delay = i * 100; in main()
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/qemu/tests/tcg/cris/bare/ |
H A D | check_movdelsr1.s | 5 ; Bug with move to special register in delay slot, due to
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/qemu/hw/gpio/ |
H A D | omap_gpio.c | 210 uint8_t delay; member 307 s->delay = 0; in omap2_gpio_module_reset() 375 return s->delay; in omap2_gpio_module_read() 481 s->delay = value; in omap2_gpio_module_write()
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/qemu/qapi/ |
H A D | migration.json | 683 # @announce-step: Increase in delay (in milliseconds) between 752 # @x-checkpoint-delay: The delay time (in ms) between two COLO 817 # @unstable: Members @x-checkpoint-delay and 853 # @announce-step: Increase in delay (in milliseconds) between 922 # @x-checkpoint-delay: The delay time (in ms) between two COLO 987 # @unstable: Members @x-checkpoint-delay and 1010 '*x-checkpoint-delay': { 'type': 'uint32', 1056 # @announce-step: Increase in delay (in milliseconds) between 1121 # @x-checkpoint-delay: the delay time between two COLO checkpoints. 1186 # @unstable: Members @x-checkpoint-delay and [all …]
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H A D | net.json | 899 # @initial: Initial delay (in ms) before sending the first GARP/RARP 902 # @max: Maximum delay (in ms) between GARP/RARP announcement packets
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H A D | machine.json | 417 # @delay: continue to deliver ticks at the normal rate. The guest OS 432 'data': ['discard', 'delay', 'slew' ] }
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/qemu/target/mips/tcg/ |
H A D | mips16e_translate.c.inc | 485 /* No delay slot, so just process as a normal instruction */ 489 /* No delay slot, so just process as a normal instruction */ 493 /* No delay slot, so just process as a normal instruction */ 688 /* No delay slot, so just process as a normal instruction */ 702 /* No delay slot, so just process as a normal instruction */ 707 /* No delay slot, so just process as a normal instruction */
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H A D | micromips_translate.c.inc | 798 * Let normal delay slot handling in our caller take us 843 * Let normal delay slot handling in our caller take us 2451 * Compact branches don't have a delay slot, so just let 2452 * the normal delay slot handling take us to the branch 2987 /* Enforce properly-sized instructions in a delay slot */
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 1147 /* delay slot */ 1157 /* delay slot */ 1176 /* delay slot */ 1184 /* delay slot */ 1297 /* delay slot */ 1307 /* delay slot */ 1633 /* delay slot */ 1653 /* delay slot */ 2437 /* delay slot */ 2455 /* delay slot */ [all …]
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/qemu/include/standard-headers/linux/ |
H A D | input.h | 309 uint16_t delay; member
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/qemu/hw/net/ |
H A D | dp8393x.c | 333 int64_t delay; in dp8393x_set_next_tick() local 342 delay = NANOSECONDS_PER_SECOND * ticks / 5000000; in dp8393x_set_next_tick() 343 timer_mod(s->watchdog, s->wt_last_update + delay); in dp8393x_set_next_tick()
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/qemu/hw/ssi/ |
H A D | aspeed_smc.c | 787 uint8_t delay = in aspeed_smc_dma_calibration() local 801 s->regs[s->r_timings] |= delay << hclk_shift; in aspeed_smc_dma_calibration() 824 uint8_t delay = in aspeed_smc_inject_read_failure() local 836 return (delay & 0x7) < 1; in aspeed_smc_inject_read_failure() 838 return (delay & 0x7) < 2; in aspeed_smc_inject_read_failure()
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/qemu/docs/devel/ |
H A D | lockcnt.txt | 70 this can improve performance, but also delay reclamation undesirably. 132 Note that it is possible for multiple concurrent accesses to delay
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H A D | tcg-icount.rst | 65 .. [1] sometimes two instructions if dealing with delay slots
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H A D | tcg.rst | 166 condition codes on x86, delay slots on SPARC, conditional execution on
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H A D | submitting-a-patch.rst | 34 subscribed) may be subject to some delay while waiting for a moderator 425 quickly, lesser-loved areas of code may have a longer delay.
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/qemu/target/microblaze/ |
H A D | translate.c | 1048 bool delay, bool abs, int link) in do_branch() argument 1055 if (delay) { in do_branch() 1090 TCGCond cond, int ra, bool delay) in DO_BR() 1097 if (delay) { in DO_BR() 1117 next = tcg_constant_i32(dc->base.pc_next + (delay + 1) * 4); in DO_BR()
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/qemu/.gitlab-ci.d/ |
H A D | cirrus.yml | 19 # as there's often a 5-10 minute delay before Cirrus CI
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/qemu/include/ui/ |
H A D | console.h | 316 int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay);
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/qemu/tcg/sparc64/ |
H A D | tcg-target.c.inc | 977 /* delay slot */ 983 /* delay slot */ 1152 /* If the guest address must be zero-extended, do in the delay slot. */ 1262 /* delay slot */
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/qemu/docs/about/ |
H A D | deprecated.rst | 33 ``delay`` option for socket character devices (since 6.0) 37 rather than ``delay=off``.
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/qemu/ui/ |
H A D | console.c | 775 int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) in dpy_set_ui_info() argument 792 qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + (delay ? 1000 : 0)); in dpy_set_ui_info()
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/qemu/hw/misc/ |
H A D | trace-events | 51 ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" 58 ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
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/qemu/tests/data/qobject/ |
H A D | qdict.txt | 4205 delay-accounting.txt: 3837 4208 delay.c: 581 4211 delay.h: 1166 4214 delay.S: 1279 4215 delay.txt: 694 4556 dm-delay.c: 8567
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