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Searched refs:dividers (Results 1 – 3 of 3) sorted by relevance

/qemu/hw/misc/
H A Dnpcm7xx_clk.c224 npcm7xx_clk_update_divider(&clk->dividers[i]); in npcm7xx_clk_update_all_dividers()
697 return clk->dividers[index].clock_out; in npcm7xx_get_clock()
723 clock_set_source(clk->dividers[i].clock_in, src); in npcm7xx_connect_clocks()
910 &s->dividers[i], TYPE_NPCM7XX_CLOCK_DIVIDER); in npcm7xx_clk_init_clock_hierarchy()
911 npcm7xx_init_clock_divider(&s->dividers[i], s, in npcm7xx_clk_init_clock_hierarchy()
962 if (!qdev_realize(DEVICE(&s->dividers[i]), NULL, errp)) { in npcm7xx_clk_realize()
/qemu/include/hw/misc/
H A Dnpcm7xx_clk.h166 NPCM7xxClockDividerState dividers[NPCM7XX_CLOCK_NR_DIVIDERS]; member
/qemu/docs/devel/
H A Dclocks.rst280 have guest-programmable frequency multipliers or dividers.