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Searched refs:error_code (Results 1 – 25 of 55) sorted by relevance

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/qemu/target/i386/tcg/
H A Dexcp_helper.c44 static int check_exception(CPUX86State *env, int intno, int *error_code, in check_exception() argument
73 *error_code = 0; in check_exception()
92 int is_int, int error_code, in raise_interrupt2() argument
100 error_code, retaddr); in raise_interrupt2()
101 intno = check_exception(env, intno, &error_code, retaddr); in raise_interrupt2()
107 env->error_code = error_code; in raise_interrupt2()
121 int error_code) in raise_exception_err() argument
123 raise_interrupt2(env, exception_index, 0, error_code, 0, 0); in raise_exception_err()
127 int error_code, uintptr_t retaddr) in raise_exception_err_ra() argument
129 raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr); in raise_exception_err_ra()
H A Dhelper-tcg.h67 int error_code);
69 int error_code, uintptr_t retaddr);
106 int error_code, target_ulong next_eip, int is_hw);
108 int error_code, int is_hw, int rm);
H A Dseg_helper.c667 cpu_stl_kernel(env, ssp, error_code); in do_interrupt_protected()
669 cpu_stw_kernel(env, ssp, error_code); in do_interrupt_protected()
766 PUSHL(ssp, esp, sp_mask, error_code); in do_interrupt_protected()
783 PUSHW(ssp, esp, sp_mask, error_code); in do_interrupt_protected()
959 PUSHQ(esp, error_code); in do_interrupt64()
1041 int error_code, unsigned int next_eip) in do_interrupt_real() argument
1084 int error_code, target_ulong next_eip, int is_hw) in do_interrupt_all() argument
1094 count, intno, error_code, is_int, in do_interrupt_all()
1125 handle_even_inj(env, intno, is_int, error_code, is_hw, 0); in do_interrupt_all()
1140 handle_even_inj(env, intno, is_int, error_code, is_hw, 1); in do_interrupt_all()
[all …]
/qemu/target/ppc/
H A Duser_only_helper.c31 int exception, error_code; in ppc_cpu_record_sigsegv() local
42 error_code = 0x40000000; in ppc_cpu_record_sigsegv()
45 error_code = 0x40000000; in ppc_cpu_record_sigsegv()
47 error_code |= 0x02000000; in ppc_cpu_record_sigsegv()
50 env->spr[SPR_DSISR] = error_code; in ppc_cpu_record_sigsegv()
53 env->error_code = error_code; in ppc_cpu_record_sigsegv()
H A Dmmu-hash32.c156 env->error_code = 0x10000000; in ppc_hash32_direct_store()
172 env->error_code = POWERPC_EXCP_ALIGN_FP; in ppc_hash32_direct_store()
177 env->error_code = 0; in ppc_hash32_direct_store()
197 env->error_code = 0; in ppc_hash32_direct_store()
217 env->error_code = 0; in ppc_hash32_direct_store()
368 env->error_code = 0; in ppc_hash32_xlate()
397 env->error_code = 0x10000000; in ppc_hash32_xlate()
408 env->error_code = 0x40000000; in ppc_hash32_xlate()
411 env->error_code = 0; in ppc_hash32_xlate()
435 env->error_code = 0x08000000; in ppc_hash32_xlate()
[all …]
H A Dexcp_helper.c189 env->error_code); in ppc_excp_debug_sw_tlb()
395 env->error_code = 0; in powerpc_reset_excp_state()
626 msr |= env->error_code; in powerpc_excp_6xx()
767 msr |= env->error_code; in powerpc_excp_7xx()
917 msr |= env->error_code; in powerpc_excp_74xx()
1386 msr |= env->error_code; in powerpc_excp_books()
1394 msr |= env->error_code; in powerpc_excp_books()
1457 lev = env->error_code; in powerpc_excp_books()
1486 lev = env->error_code; in powerpc_excp_books()
2542 env->error_code = error_code; in raise_exception_err_ra()
[all …]
H A Dmmu_common.c732 env->error_code = 0; in ppc_40x_xlate()
739 env->error_code = 0x08000000; in ppc_40x_xlate()
749 env->error_code = 0; in ppc_40x_xlate()
760 env->error_code = 0; in ppc_40x_xlate()
817 env->error_code = 1 << 18; in ppc_6xx_xlate()
824 env->error_code = 0x08000000; in ppc_6xx_xlate()
829 env->error_code = 0x10000000; in ppc_6xx_xlate()
847 env->error_code = 0; in ppc_6xx_xlate()
861 env->error_code = 0; in ppc_6xx_xlate()
881 env->error_code = 0; in ppc_6xx_xlate()
[all …]
H A Dmmu-radix64.c103 env->error_code = 0; in ppc_radix64_raise_segi()
126 env->error_code = cause; in ppc_radix64_raise_si()
136 env->error_code = 0; in ppc_radix64_raise_si()
149 env->error_code = 0; in ppc_radix64_raise_hsi()
152 env->error_code = access_type; in ppc_radix64_raise_hsi()
166 env->error_code = cause; in ppc_radix64_raise_hsi()
H A Dmmu-hash64.c771 uint64_t error_code) in ppc_hash64_set_isi() argument
787 env->error_code = error_code; in ppc_hash64_set_isi()
811 env->error_code = 0; in ppc_hash64_set_dsi()
980 env->error_code = 0; in ppc_hash64_xlate()
1036 env->error_code = 0; in ppc_hash64_xlate()
1041 env->error_code = 0; in ppc_hash64_xlate()
/qemu/target/alpha/
H A Dfpu_helper.c77 uint32_t exc = env->error_code; in helper_fp_exc_raise()
90 uint32_t exc = env->error_code & ~ignore; in helper_fp_exc_raise_s()
223 env->error_code = soft_to_fpcr_exc(env); in helper_adds()
235 env->error_code = soft_to_fpcr_exc(env); in helper_subs()
247 env->error_code = soft_to_fpcr_exc(env); in helper_muls()
259 env->error_code = soft_to_fpcr_exc(env); in helper_divs()
270 env->error_code = soft_to_fpcr_exc(env); in helper_sqrts()
300 env->error_code = soft_to_fpcr_exc(env); in helper_addt()
312 env->error_code = soft_to_fpcr_exc(env); in helper_subt()
481 env->error_code = exc; in do_cvttq()
[all …]
H A Dmem_helper.c56 env->error_code = 0; in alpha_cpu_do_unaligned_access()
71 env->error_code = 0; in alpha_cpu_do_transaction_failed()
H A Dhelper.c371 ++count, name, env->error_code, cs->cpu_index, in alpha_cpu_do_interrupt()
409 i = env->error_code; in alpha_cpu_do_interrupt()
470 env->error_code = 0; in alpha_cpu_exec_interrupt()
518 env->error_code = error; in helper_excp()
529 env->error_code = error; in dynamic_excp()
/qemu/target/i386/tcg/sysemu/
H A Dexcp_helper.c50 int error_code; member
77 .error_code = inout->env->error_code, in ptw_translate()
152 int error_code; in mmu_translate() local
437 .error_code = env->error_code, in mmu_translate()
472 error_code = PG_ERROR_RSVD_MASK; in mmu_translate()
475 error_code = PG_ERROR_P_MASK; in mmu_translate()
482 error_code = 0; in mmu_translate()
485 error_code |= PG_ERROR_U_MASK; in mmu_translate()
491 error_code |= PG_ERROR_W_MASK; in mmu_translate()
501 .error_code = error_code, in mmu_translate()
[all …]
H A Dseg_helper.c86 int error_code, int is_hw, int rm) in handle_even_inj() argument
105 error_code); in handle_even_inj()
124 env->error_code, in x86_cpu_do_interrupt()
/qemu/target/mips/tcg/
H A Dexception.c47 int error_code) in helper_raise_exception_err() argument
49 do_raise_exception_err(env, exception, error_code, 0); in helper_raise_exception_err()
140 int error_code, uintptr_t pc) in do_raise_exception_err() argument
146 error_code); in do_raise_exception_err()
148 env->error_code = error_code; in do_raise_exception_err()
H A Dop_helper.c283 int error_code = 0; in mips_cpu_do_unaligned_access() local
295 error_code |= EXCP_INST_NOTAVAIL; in mips_cpu_do_unaligned_access()
299 do_raise_exception_err(env, excp, error_code, retaddr); in mips_cpu_do_unaligned_access()
H A Dtcg-internal.h31 int error_code, uintptr_t pc);
/qemu/linux-user/ppc/
H A Dcpu_loop.c108 switch (env->error_code & ~0xF) { in cpu_loop()
111 switch (env->error_code & 0xF) { in cpu_loop()
139 env->error_code); in cpu_loop()
146 switch (env->error_code & 0xF) { in cpu_loop()
161 env->error_code & 0xF); in cpu_loop()
168 switch (env->error_code & 0xF) { in cpu_loop()
177 env->error_code & 0xF); in cpu_loop()
189 env->error_code); in cpu_loop()
/qemu/target/sparc/
H A Dmmu_helper.c75 int error_code = 0, is_dirty, is_user; in get_physical_address() local
176 error_code = access_table[*access_index][access_perms]; in get_physical_address()
177 if (error_code && !((env->mmuregs[0] & MMU_NF) && is_user)) { in get_physical_address()
178 return error_code; in get_physical_address()
202 return error_code; in get_physical_address()
213 int error_code = 0, access_index; in sparc_cpu_tlb_fill() local
224 error_code = get_physical_address(env, &full, &access_index, in sparc_cpu_tlb_fill()
227 if (likely(error_code == 0)) { in sparc_cpu_tlb_fill()
239 env->mmuregs[3] |= (access_index << 5) | error_code | 2; in sparc_cpu_tlb_fill()
763 int error_code = 0, access_index; in sparc_cpu_tlb_fill() local
[all …]
/qemu/target/mips/tcg/sysemu/
H A Dtlb_helper.c501 int exception = 0, error_code = 0; in raise_mmu_exception() local
504 error_code |= EXCP_INST_NOTAVAIL; in raise_mmu_exception()
525 error_code |= EXCP_TLB_NOMATCH; in raise_mmu_exception()
573 env->error_code = error_code; in raise_mmu_exception()
1052 env->active_tc.PC += env->error_code; in mips_cpu_do_interrupt()
1163 update_badinstr = !(env->error_code & EXCP_INST_NOTAVAIL); in mips_cpu_do_interrupt()
1167 update_badinstr = !(env->error_code & EXCP_INST_NOTAVAIL); in mips_cpu_do_interrupt()
1168 if ((env->error_code & EXCP_TLB_NOMATCH) && in mips_cpu_do_interrupt()
1189 if ((env->error_code & EXCP_TLB_NOMATCH) && in mips_cpu_do_interrupt()
1237 (env->error_code << CP0Ca_CE); in mips_cpu_do_interrupt()
[all …]
/qemu/target/i386/tcg/user/
H A Dseg_helper.c46 int error_code, target_ulong next_eip) in do_interrupt_user() argument
89 env->error_code, in x86_cpu_do_interrupt()
H A Dexcp_helper.c40 env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT) in x86_cpu_record_sigsegv()
/qemu/linux-user/include/host/arm/
H A Dhost-signal.h39 uint32_t fsr = uc->uc_mcontext.error_code; in host_signal_write()
/qemu/linux-user/mips/
H A Dcpu_loop.c194 code = env->error_code; in cpu_loop()
201 do_tr_or_bp(env, env->error_code, true); in cpu_loop()
/qemu/target/arm/
H A Dsyndrome.h250 int error_code = (data << 1) | keynumber; in syn_pacfail() local
251 return (EC_PACFAIL << ARM_EL_EC_SHIFT) | ARM_EL_IL | error_code; in syn_pacfail()

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