| /qemu/tests/tcg/xtensa/ |
| H A D | fpu.h | 78 wur a2, fcr
81 wur a2, fcr
87 wur a2, fcr
90 wur a2, fcr
96 wur a2, fcr
99 wur a2, fcr
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| H A D | test_fp0_conv.S | 32 wur a2, fcr
35 wur a2, fcr
61 wur a2, fcr
64 wur a2, fcr
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| H A D | test_fp1.S | 34 wur a2, fcr
37 wur a2, fcr
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| /qemu/hw/char/ |
| H A D | sh_serial.c | 58 uint16_t fcr; member
165 s->fcr = val; in sh_serial_write()
279 ret = s->fcr; in sh_serial_read()
406 s->fcr = 0; in sh_serial_reset()
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| H A D | serial.c | 130 (!(s->fcr & UART_FCR_FE) || in serial_update_irq()
239 if (s->fcr & UART_FCR_FE) { in serial_xmit()
290 s->fcr = val; in serial_write_fcr()
347 if(s->fcr & UART_FCR_FE) { in serial_ioport_write()
409 if ((val ^ s->fcr) & UART_FCR_FE) { in serial_ioport_write()
481 if(s->fcr & UART_FCR_FE) { in serial_ioport_read()
557 if(s->fcr & UART_FCR_FE) { in serial_can_receive()
607 if(s->fcr & UART_FCR_FE) { in serial_receive1()
634 s->fcr_vmstate = s->fcr; in serial_pre_save()
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| /qemu/include/hw/net/ |
| H A D | ftgmac100.h | 56 uint32_t fcr; member
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| /qemu/include/hw/char/ |
| H A D | serial.h | 52 uint8_t fcr; member
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| /qemu/hw/net/ |
| H A D | ftgmac100.c | 694 s->fcr = 0x400; in ftgmac100_do_reset()
739 return s->fcr; in ftgmac100_read()
895 s->fcr = value; in ftgmac100_write()
1142 VMSTATE_UINT32(fcr, FTGMAC100State),
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| /qemu/hw/display/ |
| H A D | vga_int.h | 90 uint8_t fcr; /* Feature Control Register */ member
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| H A D | vga.c | 378 val = s->fcr; in vga_ioport_read()
544 s->fcr = val & 0x10; in vga_ioport_write()
1837 s->fcr = 0; in vga_common_reset()
2144 VMSTATE_UINT8(fcr, VGACommonState),
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| H A D | cirrus_vga.c | 2551 val = s->fcr; in cirrus_vga_ioport_read()
2674 s->fcr = val & 0x10; in cirrus_vga_ioport_write()
2756 VMSTATE_UINT8(vga.fcr, CirrusVGAState),
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| /qemu/target/xtensa/core-de233_fpu/ |
| H A D | gdb-config.c.inc | 107 XTREG( 68,336,32, 4, 4,0x03e8,0x0006, 0, 3,0x0100,fcr, 0,0,0,0,0,0)
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| H A D | xtensa-modules.c.inc | 17434 { "rur.fcr", ICLASS_rur_fcr,
17437 { "wur.fcr", ICLASS_wur_fcr,
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| /qemu/target/xtensa/core-dsp3400/ |
| H A D | gdb-config.c.inc | 102 XTREG( 63,252,32, 4, 4,0x03e8,0x0006, 0, 3,0x0100,fcr, 0,0,0,0,0,0)
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| H A D | xtensa-modules.c.inc | 76319 { "rur.fcr", ICLASS_rur_fcr,
76322 { "wur.fcr", ICLASS_wur_fcr,
|