Searched refs:fcsr0 (Results 1 – 10 of 10) sorted by relevance
/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_fmov.c.inc | 97 tcg_gen_st32_i64(Rj, tcg_env, offsetof(CPULoongArchState, fcsr0)); 99 TCGv_i32 fcsr0 = tcg_temp_new_i32(); 102 tcg_gen_ld_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0)); 105 tcg_gen_andi_i32(fcsr0, fcsr0, ~mask); 106 tcg_gen_or_i32(fcsr0, fcsr0, temp); 107 tcg_gen_st_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0)); 130 tcg_gen_ld32u_i64(dest, tcg_env, offsetof(CPULoongArchState, fcsr0));
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/qemu/linux-user/loongarch64/ |
H A D | cpu_loop.c | 55 if (GET_FP_CAUSE(env->fcsr0) & FP_INVALID) { in cpu_loop() 57 } else if (GET_FP_CAUSE(env->fcsr0) & FP_DIV0) { in cpu_loop() 59 } else if (GET_FP_CAUSE(env->fcsr0) & FP_OVERFLOW) { in cpu_loop() 61 } else if (GET_FP_CAUSE(env->fcsr0) & FP_UNDERFLOW) { in cpu_loop() 63 } else if (GET_FP_CAUSE(env->fcsr0) & FP_INEXACT) { in cpu_loop()
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H A D | signal.c | 185 __put_user(env->fcsr0, &lasx_ctx->fcsr); in setup_sigframe() 200 __put_user(env->fcsr0, &lsx_ctx->fcsr); in setup_sigframe() 214 __put_user(env->fcsr0, &fpu_ctx->fcsr); in setup_sigframe() 302 __get_user(env->fcsr0, &lasx_ctx->fcsr); in restore_sigframe() 314 __get_user(env->fcsr0, &lsx_ctx->fcsr); in restore_sigframe() 325 __get_user(env->fcsr0, &fpu_ctx->fcsr); in restore_sigframe()
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/qemu/target/loongarch/ |
H A D | gdbstub.c | 95 return gdb_get_reg32(mem_buf, env->fcsr0); in loongarch_gdb_get_fpu() 113 env->fcsr0 = ldl_p(mem_buf); in loongarch_gdb_set_fpu()
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H A D | machine.c | 42 VMSTATE_UINT32(env.fcsr0, LoongArchCPU),
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H A D | cpu.c | 511 env->fcsr0 = 0x0; in loongarch_cpu_reset_hold() 687 qemu_fprintf(f, " FCSR0 0x%08x\n", env->fcsr0); in loongarch_cpu_dump_state()
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H A D | cpu.h | 290 uint32_t fcsr0; member
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/qemu/target/loongarch/tcg/ |
H A D | fpu_helper.c | 31 set_float_rounding_mode(ieee_rm[(env->fcsr0 >> FCSR0_RM) & 0x3], in restore_fp_status() 66 SET_FP_CAUSE(env->fcsr0, flags); in update_fcsr0_mask() 70 SET_FP_CAUSE(env->fcsr0, flags); in update_fcsr0_mask() 73 if (GET_FP_ENABLES(env->fcsr0) & flags) { in update_fcsr0_mask() 76 UPDATE_FP_FLAGS(env->fcsr0, flags); in update_fcsr0_mask() 877 set_float_rounding_mode(ieee_rm[(env->fcsr0 >> FCSR0_RM) & 0x3], in helper_set_rounding_mode()
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H A D | vec_helper.c | 2385 UPDATE_FP_CAUSE(env->fcsr0, flags); in vec_update_fcsr0_mask() 2388 if (GET_FP_ENABLES(env->fcsr0) & flags) { in vec_update_fcsr0_mask() 2391 UPDATE_FP_FLAGS(env->fcsr0, flags); in vec_update_fcsr0_mask() 2402 SET_FP_CAUSE(env->fcsr0, 0); in vec_clear_cause()
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/qemu/target/loongarch/kvm/ |
H A D | kvm.c | 436 env->fcsr0 = fpu.fcsr; in kvm_loongarch_get_regs_fp() 457 fpu.fcsr = env->fcsr0; in kvm_loongarch_put_regs_fp()
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