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Searched refs:gic (Results 1 – 25 of 47) sorted by relevance

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/qemu/hw/intc/
H A Dmips_gic.c31 for (i = 0; i < gic->num_irq; i++) { in mips_gic_set_vp_irq()
63 if (vp < 0 || vp >= gic->num_vps) { in gic_update_pin_for_irq()
66 mips_gic_set_vp_irq(gic, vp, pin); in gic_update_pin_for_irq()
74 if (!gic->irq_state[n_IRQ].enabled) { in gic_set_irq()
78 gic_update_pin_for_irq(gic, n_IRQ); in gic_set_irq()
94 return gic->vps[vp_index].ctl; in gic_read_vp()
97 return gic->vps[vp_index].pend; in gic_read_vp()
99 return gic->vps[vp_index].mask; in gic_read_vp()
128 ret = gic->sh_config | (mips_gictimer_get_countstop(gic->gic_timer) << in gic_read()
198 MIPSGICState *gic = opaque; in gic_timer_expire_cb() local
[all …]
H A Drealview_gic.c21 qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); in realview_gic_set_irq()
35 qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", numirq); in realview_gic_realize()
36 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in realview_gic_realize()
39 busdev = SYS_BUS_DEVICE(&s->gic); in realview_gic_realize()
62 object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); in realview_gic_init()
63 qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", 1); in realview_gic_init()
H A Darm_gicv3.c120 if (cs->gic->gicd_ctlr & GICD_CTLR_DS) { in gicr_int_pending()
127 if (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP1NS) { in gicr_int_pending()
130 if (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP1S) { in gicr_int_pending()
133 if (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP0) { in gicr_int_pending()
149 nmi = *gic_bmp_ptr32(cs->gic->nmi, irq); in gicv3_get_priority()
155 if (!(cs->gic->gicd_ctlr & GICD_CTLR_DS) && in gicv3_get_priority()
157 (!is_redist && gicv3_gicd_group_test(cs->gic, irq)))) { in gicv3_get_priority()
169 *prio = cs->gic->gicd_ipriority[irq]; in gicv3_get_priority()
210 cs->hppi.grp = gicv3_irq_group(cs->gic, cs, cs->hppi.irq); in gicv3_redist_update_noirqset()
214 (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP1NS) && in gicv3_redist_update_noirqset()
[all …]
H A Darm_gicv3_redist.c24 if (!attrs.secure && !(cs->gic->gicd_ctlr & GICD_CTLR_DS)) { in mask_group()
105 address_space_read(&cs->gic->dma_as, in update_for_one_lpi()
154 AddressSpace *as = &cs->gic->dma_as; in update_for_all_lpis()
186 AddressSpace *as = &cs->gic->dma_as; in set_pending_table_bit()
422 *data = cs->gic->nmi_support ? in gicr_readl()
575 if (cs->gic->nmi_support) { in gicr_writel()
715 GICv3State *s = region->gic; in gicv3_redist_read()
774 GICv3State *s = region->gic; in gicv3_redist_write()
982 AddressSpace *as = &src->gic->dma_as; in gicv3_redist_movall_lpis()
1159 int irqgrp = gicv3_irq_group(cs->gic, cs, irq); in gicv3_redist_send_sgi()
[all …]
H A Dexynos4210_gic.c51 qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level); in exynos4210_gic_set_irq()
63 s->gic = qdev_new("arm_gic"); in exynos4210_gic_realize()
64 qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); in exynos4210_gic_realize()
65 qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); in exynos4210_gic_realize()
66 gicbusdev = SYS_BUS_DEVICE(s->gic); in exynos4210_gic_realize()
H A Darm_gicv3_cpuif.c1181 gicv3_gicd_active_set(cs->gic, irq); in icc_activate_irq()
1182 gicv3_gicd_pending_clear(cs->gic, irq); in icc_activate_irq()
1183 gicv3_update(cs->gic, irq, 1); in icc_activate_irq()
1442 gicv3_gicd_active_clear(cs->gic, irq); in icc_deactivate_irq()
1443 gicv3_update(cs->gic, irq, 1); in icc_deactivate_irq()
1662 if ((irq >= cs->gic->num_irq) && in icc_eoir_write()
1681 if (!(cs->gic->gicd_ctlr & GICD_CTLR_DS) in icc_eoir_write()
1901 if (irq >= cs->gic->num_irq) { in icc_dir_write()
1910 int grp = gicv3_irq_group(cs->gic, cs, irq); in icc_dir_write()
2014 GICv3State *s = cs->gic; in icc_generate_sgi()
[all …]
/qemu/hw/arm/
H A Dallwinner-h3.c270 qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2); in allwinner_h3_realize()
274 sysbus_realize(SYS_BUS_DEVICE(&s->gic), &error_fatal); in allwinner_h3_realize()
309 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gic), i, in allwinner_h3_realize()
384 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
387 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
390 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
393 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
397 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
400 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
403 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_h3_realize()
[all …]
H A Dbcm2838.c44 qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); in bcm2838_gic_set_irq()
116 if (!object_property_set_uint(OBJECT(&s->gic), "num-irq", in bcm2838_realize()
121 if (!object_property_set_bool(OBJECT(&s->gic), in bcm2838_realize()
127 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in bcm2838_realize()
131 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, in bcm2838_realize()
133 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, in bcm2838_realize()
135 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 2, in bcm2838_realize()
137 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 3, in bcm2838_realize()
141 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 4 + n, in bcm2838_realize()
146 gicdev = DEVICE(&s->gic); in bcm2838_realize()
[all …]
H A Dallwinner-r40.c277 object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); in allwinner_r40_init()
344 qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2); in allwinner_r40_realize()
348 sysbus_realize(SYS_BUS_DEVICE(&s->gic), &error_fatal); in allwinner_r40_realize()
378 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_r40_realize()
383 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gic), i, in allwinner_r40_realize()
394 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_r40_realize()
402 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_r40_realize()
405 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_r40_realize()
451 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_r40_realize()
462 qdev_get_gpio_in(DEVICE(&s->gic), in allwinner_r40_realize()
[all …]
H A Dxlnx-zynqmp.c271 sysbus_connect_irq(sbd, 0, gic[BBRAM_IRQ]); in xlnx_zynqmp_create_bbram()
296 sysbus_connect_irq(sbd, 0, gic[EFUSE_IRQ]); in xlnx_zynqmp_create_efuse()
317 sysbus_connect_irq(sbd, 0, gic[APU_IRQ]); in xlnx_zynqmp_create_apu_ctrl()
329 sysbus_connect_irq(sbd, 0, gic[CRF_IRQ]); in xlnx_zynqmp_create_crf()
509 qdev_prop_set_bit(DEVICE(&s->gic), in xlnx_zynqmp_realize()
548 SysBusDevice *gic = SYS_BUS_DEVICE(&s->gic); in xlnx_zynqmp_realize() local
585 irq = qdev_get_gpio_in(DEVICE(&s->gic), in xlnx_zynqmp_realize()
588 irq = qdev_get_gpio_in(DEVICE(&s->gic), in xlnx_zynqmp_realize()
591 irq = qdev_get_gpio_in(DEVICE(&s->gic), in xlnx_zynqmp_realize()
594 irq = qdev_get_gpio_in(DEVICE(&s->gic), in xlnx_zynqmp_realize()
[all …]
H A Dsbsa-ref.c110 DeviceState *gic; member
440 sms->gic = qdev_new(gictype); in create_gic()
441 qdev_prop_set_uint32(sms->gic, "revision", 3); in create_gic()
442 qdev_prop_set_uint32(sms->gic, "num-cpu", smp_cpus); in create_gic()
447 qdev_prop_set_uint32(sms->gic, "num-irq", NUM_IRQS + 32); in create_gic()
458 object_property_set_link(OBJECT(sms->gic), "sysmem", in create_gic()
460 qdev_prop_set_bit(sms->gic, "has-lpi", true); in create_gic()
462 gicbusdev = SYS_BUS_DEVICE(sms->gic); in create_gic()
490 qdev_get_gpio_in(sms->gic, in create_gic()
495 qdev_get_gpio_in(sms->gic, in create_gic()
[all …]
H A Dmps3r.c105 GICv3State gic; member
268 object_initialize_child(OBJECT(mms), "gic", &mms->gic, TYPE_ARM_GICV3); in create_gic()
269 gicdev = DEVICE(&mms->gic); in create_gic()
275 object_property_set_link(OBJECT(&mms->gic), "sysmem", in create_gic()
277 sysbus_realize(SYS_BUS_DEVICE(&mms->gic), &error_fatal); in create_gic()
278 sysbus_mmio_map(SYS_BUS_DEVICE(&mms->gic), 0, PERIPHBASE); in create_gic()
279 sysbus_mmio_map(SYS_BUS_DEVICE(&mms->gic), 1, PERIPHBASE + 0x100000); in create_gic()
287 SysBusDevice *gicsbd = SYS_BUS_DEVICE(&mms->gic); in create_gic()
406 gicdev = DEVICE(&mms->gic); in mps3r_common_init()
H A Dvirt.c776 vms->gic = qdev_new(gictype); in create_gic()
777 qdev_prop_set_uint32(vms->gic, "revision", revision); in create_gic()
778 qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); in create_gic()
782 qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32); in create_gic()
803 qdev_prop_set_array(vms->gic, "redist-region-count", in create_gic()
810 qdev_prop_set_bit(vms->gic, "has-lpi", true); in create_gic()
821 qdev_prop_set_bit(vms->gic, "has-nmi", true); in create_gic()
824 gicbusdev = SYS_BUS_DEVICE(vms->gic); in create_gic()
862 qdev_get_gpio_in(vms->gic, in create_gic()
867 qemu_irq irq = qdev_get_gpio_in(vms->gic, in create_gic()
[all …]
/qemu/include/hw/timer/
H A Dmips_gictimer.h34 uint32_t mips_gictimer_get_freq(MIPSGICTimerState *gic);
35 uint32_t mips_gictimer_get_sh_count(MIPSGICTimerState *gic);
36 void mips_gictimer_store_sh_count(MIPSGICTimerState *gic, uint64_t count);
39 void mips_gictimer_store_vp_compare(MIPSGICTimerState *gic, uint32_t vp_index,
41 uint8_t mips_gictimer_get_countstop(MIPSGICTimerState *gic);
42 void mips_gictimer_start_count(MIPSGICTimerState *gic);
43 void mips_gictimer_stop_count(MIPSGICTimerState *gic);
/qemu/hw/cpu/
H A Drealview_mpcore.c34 RealViewGICState gic[4]; member
66 DeviceState *gic; in realview_mpcore_realize() local
81 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic[n]), errp)) { in realview_mpcore_realize()
84 gic = DEVICE(&s->gic[n]); in realview_mpcore_realize()
85 gicbusdev = SYS_BUS_DEVICE(&s->gic[n]); in realview_mpcore_realize()
89 s->rvic[n][i] = qdev_get_gpio_in(gic, i); in realview_mpcore_realize()
107 object_initialize_child(obj, "gic[*]", &s->gic[i], TYPE_REALVIEW_GIC); in mpcore_rirq_init()
H A Darm11mpcore.c24 qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); in mpcore_priv_set_irq()
31 DeviceState *gicdev = DEVICE(&s->gic); in mpcore_priv_map_setup()
32 SysBusDevice *gicbusdev = SYS_BUS_DEVICE(&s->gic); in mpcore_priv_map_setup()
76 DeviceState *gicdev = DEVICE(&s->gic); in mpcore_priv_realize()
91 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in mpcore_priv_realize()
96 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->gic)); in mpcore_priv_realize()
125 object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); in mpcore_priv_initfn()
127 qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 0); in mpcore_priv_initfn()
H A Da15mpcore.c35 qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); in a15mp_priv_set_irq()
46 object_initialize_child(obj, "gic", &s->gic, gic_class_name()); in a15mp_priv_initfn()
47 qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2); in a15mp_priv_initfn()
61 gicdev = DEVICE(&s->gic); in a15mp_priv_realize()
79 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in a15mp_priv_realize()
82 busdev = SYS_BUS_DEVICE(&s->gic); in a15mp_priv_realize()
H A Da9mpcore.c26 qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); in a9mp_priv_set_irq()
38 object_initialize_child(obj, "gic", &s->gic, TYPE_ARM_GIC); in a9mp_priv_initfn()
75 gicdev = DEVICE(&s->gic); in a9mp_priv_realize()
88 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in a9mp_priv_realize()
91 gicbusdev = SYS_BUS_DEVICE(&s->gic); in a9mp_priv_realize()
/qemu/hw/mips/
H A Dcps.c33 return s->gic.irq_state[pin_number].irq; in get_cps_irq()
132 object_initialize_child(OBJECT(dev), "gic", &s->gic, TYPE_MIPS_GIC); in mips_cps_realize()
133 object_property_set_uint(OBJECT(&s->gic), "num-vp", s->num_vp, in mips_cps_realize()
135 object_property_set_uint(OBJECT(&s->gic), "num-irq", 128, in mips_cps_realize()
137 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) { in mips_cps_realize()
142 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gic), 0)); in mips_cps_realize()
154 object_property_set_link(OBJECT(&s->gcr), "gic", OBJECT(&s->gic.mr), in mips_cps_realize()
/qemu/include/hw/intc/
H A Drealview_gic.h25 GICState gic; member
H A Dexynos4210_gic.h40 DeviceState *gic; member
/qemu/include/hw/arm/
H A Dbcm2838.h28 GICState gic; member
/qemu/include/hw/cpu/
H A Da15mpcore.h41 GICState gic; member
H A Darm11mpcore.h30 GICState gic; member
H A Da9mpcore.h33 GICState gic; member

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