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Searched refs:gic_num_lrs (Results 1 – 4 of 4) sorted by relevance

/qemu/target/arm/tcg/
H A Dcpu64.c114 cpu->gic_num_lrs = 4; in aarch64_a35_initfn()
283 cpu->gic_num_lrs = 4; in aarch64_a55_initfn()
345 cpu->gic_num_lrs = 4; in aarch64_a72_initfn()
408 cpu->gic_num_lrs = 4; in aarch64_a76_initfn()
456 cpu->gic_num_lrs = 4; in aarch64_a64fx_initfn()
648 cpu->gic_num_lrs = 4; in aarch64_neoverse_n1_initfn()
732 cpu->gic_num_lrs = 4; in aarch64_neoverse_v1_initfn()
947 cpu->gic_num_lrs = 4; in aarch64_a710_initfn()
1045 cpu->gic_num_lrs = 4; in aarch64_neoverse_n2_initfn()
/qemu/target/arm/
H A Dcpu64.c645 cpu->gic_num_lrs = 4; in aarch64_a57_initfn()
703 cpu->gic_num_lrs = 4; in aarch64_a53_initfn()
H A Dcpu.h1063 int gic_num_lrs; /* number of list registers */ member
/qemu/hw/intc/
H A Darm_gicv3_cpuif.c3119 cs->num_list_regs = cpu->gic_num_lrs ?: 4; in gicv3_init_cpuif()