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Searched refs:gpio (Results 1 – 25 of 84) sorted by relevance

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/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c294 g_assert_cmphex(gpio_readl(gpio, IDR), ==, reset(gpio, IDR)); in test_gpio_output_mode()
308 gpio_writel(gpio, ODR, reset(gpio, ODR)); in test_gpio_output_mode()
309 gpio_writel(gpio, MODER, reset(gpio, MODER)); in test_gpio_output_mode()
339 gpio_writel(gpio, MODER, reset(gpio, MODER)); in test_gpio_input_mode()
368 gpio_writel(gpio, MODER, reset(gpio, MODER)); in test_pull_up_pull_down()
369 gpio_writel(gpio, PUPDR, reset(gpio, PUPDR)); in test_pull_up_pull_down()
412 gpio_writel(gpio, MODER, reset(gpio, MODER)); in test_push_pull()
470 gpio_writel(gpio, OTYPER, reset(gpio, OTYPER)); in test_open_drain()
471 gpio_writel(gpio, ODR, reset(gpio, ODR)); in test_open_drain()
472 gpio_writel(gpio, MODER, reset(gpio, MODER)); in test_open_drain()
[all …]
/qemu/hw/misc/macio/
H A Dgpio.c42 trace_macio_set_gpio(gpio, state); in macio_set_gpio()
44 if (s->gpio_regs[gpio] & 4) { in macio_set_gpio()
49 new_reg = s->gpio_regs[gpio] & ~2; in macio_set_gpio()
54 if (new_reg == s->gpio_regs[gpio]) { in macio_set_gpio()
58 s->gpio_regs[gpio] = new_reg; in macio_set_gpio()
67 switch (gpio) { in macio_set_gpio()
71 trace_macio_gpio_irq_assert(gpio); in macio_set_gpio()
72 qemu_irq_raise(s->gpio_extirqs[gpio]); in macio_set_gpio()
74 trace_macio_gpio_irq_deassert(gpio); in macio_set_gpio()
82 trace_macio_gpio_irq_assert(gpio); in macio_set_gpio()
[all …]
H A Dtrace-events17 # gpio.c
18 macio_set_gpio(int gpio, bool state) "setting GPIO %d to %d"
19 macio_gpio_irq_assert(int gpio) "asserting GPIO %d"
20 macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d"
/qemu/tests/qtest/libqos/
H A Dvirtio-gpio.c18 static void virtio_gpio_cleanup(QVhostUserGPIO *gpio) in virtio_gpio_cleanup() argument
20 QVirtioDevice *vdev = gpio->vdev; in virtio_gpio_cleanup()
26 g_free(gpio->queues); in virtio_gpio_cleanup()
34 static void virtio_gpio_setup(QVhostUserGPIO *gpio) in virtio_gpio_setup() argument
36 QVirtioDevice *vdev = gpio->vdev; in virtio_gpio_setup()
44 gpio->queues = g_new(QVirtQueue *, 2); in virtio_gpio_setup()
75 virtio_gpio_cleanup(&gpio_dev->gpio); in qvirtio_gpio_device_destructor()
81 virtio_gpio_setup(&gpio_dev->gpio); in qvirtio_gpio_device_start_hw()
107 virtio_gpio_cleanup(&gpio_pci->gpio); in qvirtio_gpio_pci_destructor()
117 virtio_gpio_setup(&gpio_pci->gpio); in qvirtio_gpio_pci_start_hw()
[all …]
H A Dvirtio-gpio.h27 QVhostUserGPIO gpio; member
32 QVhostUserGPIO gpio; member
/qemu/hw/pci-host/
H A Darticia.c54 return (s->gpio >> (addr * 8)) & 0xff; in articia_gpio_read()
68 if ((s->gpio & (0xff << sh)) != (val & 0xff) << sh) { in articia_gpio_write()
69 s->gpio &= ~(0xff << sh | 0xff); in articia_gpio_write()
70 s->gpio |= (val & 0xff) << sh; in articia_gpio_write()
71 s->gpio |= bitbang_i2c_set(&s->smbus, BITBANG_I2C_SDA, in articia_gpio_write()
72 s->gpio & BIT(16) ? in articia_gpio_write()
73 !!(s->gpio & BIT(8)) : 1); in articia_gpio_write()
74 if ((s->gpio & BIT(17))) { in articia_gpio_write()
75 s->gpio &= ~BIT(0); in articia_gpio_write()
76 s->gpio |= bitbang_i2c_set(&s->smbus, BITBANG_I2C_SCL, in articia_gpio_write()
[all …]
/qemu/hw/arm/
H A Dpalm.c91 tsc = tsc2102_init(qdev_get_gpio_in(cpu->gpio, PALMTE_PINTDAV_GPIO)); in palmte_microwire_setup()
194 qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO), in palmte_gpio_setup()
198 qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, in palmte_gpio_setup()
200 qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, in palmte_gpio_setup()
202 qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2)); in palmte_gpio_setup()
203 qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3)); in palmte_gpio_setup()
204 qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4)); in palmte_gpio_setup()
209 qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO)); in palmte_gpio_setup()
210 qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USB_OR_DC_GPIO)); in palmte_gpio_setup()
211 qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, 4)); in palmte_gpio_setup()
[all …]
H A Dtosa.c112 qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT))); in tosa_gpio_setup()
115 qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, in tosa_gpio_setup()
120 qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_CF_IRQ), in tosa_gpio_setup()
121 qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_CF_CD)); in tosa_gpio_setup()
124 qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ), in tosa_gpio_setup()
148 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_USB_IN)); in tosa_gpio_setup()
251 qdev_get_gpio_in(mpu->gpio, TOSA_GPIO_TC6393XB_INT)); in tosa_init()
H A Dbcm2838_peripherals.c39 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2838_GPIO); in bcm2838_peripherals_init()
41 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci", in bcm2838_peripherals_init()
43 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost", in bcm2838_peripherals_init()
186 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in bcm2838_peripherals_realize()
191 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0)); in bcm2838_peripherals_realize()
193 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus"); in bcm2838_peripherals_realize()
H A Db-l475e-iot01a.c78 unsigned gpio, pin; in bl475e_init() local
105 gpio = dm163_input[i] / GPIO_NUM_PINS; in bl475e_init()
107 qdev_connect_gpio_out(DEVICE(&s->soc.gpio[gpio]), pin, in bl475e_init()
H A Dnseries.c149 qdev_connect_gpio_out(s->mpu->gpio, N8X0_MMC_CS_GPIO, in n8x0_gpio_setup()
151 qemu_irq_lower(qdev_get_gpio_in(s->mpu->gpio, N800_BAT_COVER_GPIO)); in n8x0_gpio_setup()
193 qdev_get_gpio_in(s->mpu->gpio, N8X0_ONENAND_GPIO)); in n8x0_nand_setup()
217 qemu_irq tmp_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_TMP105_GPIO); in n8x0_i2c_setup()
291 qemu_irq dav = qdev_get_gpio_in(s->mpu->gpio, N800_TSC_TS_GPIO); in n800_tsc_kbd_setup()
313 qemu_irq pintdav = qdev_get_gpio_in(s->mpu->gpio, N810_TSC_TS_GPIO); in n810_tsc_setup()
782 qemu_irq retu_irq = qdev_get_gpio_in(s->mpu->gpio, N8X0_RETU_GPIO); in n8x0_cbus_setup()
787 qdev_connect_gpio_out(s->mpu->gpio, N8X0_CBUS_CLK_GPIO, cbus->clk); in n8x0_cbus_setup()
788 qdev_connect_gpio_out(s->mpu->gpio, N8X0_CBUS_DAT_GPIO, cbus->dat); in n8x0_cbus_setup()
789 qdev_connect_gpio_out(s->mpu->gpio, N8X0_CBUS_SEL_GPIO, cbus->sel); in n8x0_cbus_setup()
[all …]
H A Dspitz.c524 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); in spitz_keyboard_register()
533 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], in spitz_keyboard_register()
738 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_LCDCON_CS, in spitz_ssp_attach()
740 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_ADS7846_CS, in spitz_ssp_attach()
742 qdev_connect_gpio_out(sms->mpu->gpio, SPITZ_GPIO_MAX1111_CS, in spitz_ssp_attach()
792 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, in spitz_i2c_setup()
952 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); in spitz_gpio_setup()
957 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), in spitz_gpio_setup()
958 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); in spitz_gpio_setup()
961 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); in spitz_gpio_setup()
[all …]
H A Dfsl-imx31.c57 object_initialize_child(obj, "gpio[*]", &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx31_init()
174 object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", false, in fsl_imx31_realize()
176 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) { in fsl_imx31_realize()
179 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr); in fsl_imx31_realize()
181 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx31_realize()
H A Dnrf51_soc.c141 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in nrf51_soc_realize()
145 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0); in nrf51_soc_realize()
149 qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, NULL); in nrf51_soc_realize()
200 object_initialize_child(obj, "gpio", &s->gpio, TYPE_NRF51_GPIO); in nrf51_soc_init()
H A Dfsl-imx6.c79 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx6_init()
298 object_property_set_bool(OBJECT(&s->gpio[i]), "has-edge-sel", true, in fsl_imx6_realize()
300 object_property_set_bool(OBJECT(&s->gpio[i]), "has-upper-pin-irq", in fsl_imx6_realize()
302 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), errp)) { in fsl_imx6_realize()
306 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr); in fsl_imx6_realize()
307 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0, in fsl_imx6_realize()
310 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1, in fsl_imx6_realize()
H A Dstm32l4x5_soc.c150 object_initialize_child(obj, name, &s->gpio[i], TYPE_STM32L4X5_GPIO); in stm32l4x5_soc_initfn()
218 dev = DEVICE(&s->gpio[i]); in stm32l4x5_soc_realize()
226 busdev = SYS_BUS_DEVICE(&s->gpio[i]); in stm32l4x5_soc_realize()
229 qdev_connect_clock_in(DEVICE(&s->gpio[i]), "clk", in stm32l4x5_soc_realize()
247 qdev_connect_gpio_out(DEVICE(&s->gpio[i]), j, in stm32l4x5_soc_realize()
H A Dgumstix.c76 smc91c111_init(0x04000300, qdev_get_gpio_in(cpu->gpio, 36)); in connex_init()
99 smc91c111_init(0x04000300, qdev_get_gpio_in(cpu->gpio, 99)); in verdex_init()
H A Dmps2-tz.c151 UnimplementedDeviceState gpio[4]; member
975 { "gpio0", make_unimp_dev, &mms->gpio[0], 0x40100000, 0x1000 }, in mps2tz_common_init()
976 { "gpio1", make_unimp_dev, &mms->gpio[1], 0x40101000, 0x1000 }, in mps2tz_common_init()
977 { "gpio2", make_unimp_dev, &mms->gpio[2], 0x40102000, 0x1000 }, in mps2tz_common_init()
978 { "gpio3", make_unimp_dev, &mms->gpio[3], 0x40103000, 0x1000 }, in mps2tz_common_init()
1038 { "gpio0", make_unimp_dev, &mms->gpio[0], 0x41100000, 0x1000 }, in mps2tz_common_init()
1039 { "gpio1", make_unimp_dev, &mms->gpio[1], 0x41101000, 0x1000 }, in mps2tz_common_init()
1040 { "gpio2", make_unimp_dev, &mms->gpio[2], 0x41102000, 0x1000 }, in mps2tz_common_init()
1041 { "gpio3", make_unimp_dev, &mms->gpio[3], 0x41103000, 0x1000 }, in mps2tz_common_init()
1092 { "gpio0", make_unimp_dev, &mms->gpio[0], 0x41100000, 0x1000 }, in mps2tz_common_init()
[all …]
/qemu/hw/input/
H A Dlm832x.c60 } gpio; member
191 ret = s->gpio.dir; in lm_kbd_read()
194 ret = s->gpio.mask; in lm_kbd_read()
286 s->gpio.pull = value; in lm_kbd_write()
288 s->gpio.pull |= value << 8; in lm_kbd_write()
295 s->gpio.dir = value; in lm_kbd_write()
297 s->gpio.dir |= value << 8; in lm_kbd_write()
304 s->gpio.mask = value; in lm_kbd_write()
306 s->gpio.mask |= value << 8; in lm_kbd_write()
454 VMSTATE_UINT16(gpio.pull, LM823KbdState),
[all …]
/qemu/hw/gpio/
H A Dtrace-events22 pl061_set_output(const char *id, int gpio, int level) "%s setting output %d to %d"
23 pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to %d"
40 stm32l4x5_gpio_read(char *gpio, uint64_t addr) "GPIO%s addr: 0x%" PRIx64 " "
41 stm32l4x5_gpio_write(char *gpio, uint64_t addr, uint64_t data) "GPIO%s addr: 0x%" PRIx64 " val: 0x%…
42 stm32l4x5_gpio_update_idr(char *gpio, uint32_t old_idr, uint32_t new_idr) "GPIO%s from: 0x%x to: 0x…
43 stm32l4x5_gpio_pins(char *gpio, uint16_t disconnected, uint16_t high) "GPIO%s disconnected pins: 0x…
H A Daspeed_gpio.c233 uint32_t int_trigger = extract32(regs->int_sens_0, gpio, 1) in aspeed_evaluate_irq()
234 | extract32(regs->int_sens_1, gpio, 1) << 1 in aspeed_evaluate_irq()
235 | extract32(regs->int_sens_2, gpio, 1) << 2; in aspeed_evaluate_irq()
236 uint32_t gpio_curr_high = extract32(regs->data_value, gpio, 1); in aspeed_evaluate_irq()
237 uint32_t gpio_int_enabled = extract32(regs->int_enable, gpio, 1); in aspeed_evaluate_irq()
256 regs->int_status = deposit32(regs->int_status, gpio, 1, 1); in aspeed_evaluate_irq()
278 int gpio; in aspeed_gpio_update() local
283 for (gpio = 0; gpio < ASPEED_GPIOS_PER_SET; gpio++) { in aspeed_gpio_update()
284 uint32_t mask = 1 << gpio; in aspeed_gpio_update()
307 qemu_set_irq(s->gpios[set][gpio], !!(new & mask)); in aspeed_gpio_update()
[all …]
/qemu/hw/misc/
H A Dstm32l4x5_syscfg.c88 const uint8_t gpio = irq / GPIO_NUM_PINS; in stm32l4x5_syscfg_set_irq() local
94 g_assert(gpio < NUM_GPIOS); in stm32l4x5_syscfg_set_irq()
95 trace_stm32l4x5_syscfg_set_irq(gpio, line, level); in stm32l4x5_syscfg_set_irq()
97 if (extract32(s->exticr[exticr_reg], startbit, 4) == gpio) { in stm32l4x5_syscfg_set_irq()
/qemu/hw/riscv/
H A Dsifive_e.c187 object_initialize_child(obj, "riscv.sifive.e.gpio0", &s->gpio, in type_init()
242 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { in sifive_e_soc_realize()
247 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, memmap[SIFIVE_E_DEV_GPIO0].base); in sifive_e_soc_realize()
250 qdev_pass_gpios(DEVICE(&s->gpio), dev, NULL); in sifive_e_soc_realize()
254 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), i, in sifive_e_soc_realize()
/qemu/include/standard-headers/linux/
H A Dvirtio_gpio.h45 uint16_t gpio; member
61 uint16_t gpio; member
/qemu/hw/dma/
H A Dsparc32_dma.c202 qemu_irq_raise(s->gpio[GPIO_RESET]); in dma_mem_write()
203 qemu_irq_lower(s->gpio[GPIO_RESET]); in dma_mem_write()
211 qemu_irq_raise(s->gpio[GPIO_DMA]); in dma_mem_write()
214 qemu_irq_lower(s->gpio[GPIO_DMA]); in dma_mem_write()
274 qdev_init_gpio_out(dev, s->gpio, 2); in sparc32_dma_device_init()

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