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Searched refs:gr (Results 1 – 25 of 25) sorted by relevance

/qemu/bsd-user/arm/
H A Dsignal.c86 uint32_t *gr = mcp->__gregs; in get_mcontext() local
90 gr[TARGET_REG_R0] = 0; in get_mcontext()
91 gr[TARGET_REG_CPSR] &= ~CPSR_C; in get_mcontext()
96 gr[TARGET_REG_R1] = tswap32(env->regs[1]); in get_mcontext()
97 gr[TARGET_REG_R2] = tswap32(env->regs[2]); in get_mcontext()
98 gr[TARGET_REG_R3] = tswap32(env->regs[3]); in get_mcontext()
99 gr[TARGET_REG_R4] = tswap32(env->regs[4]); in get_mcontext()
100 gr[TARGET_REG_R5] = tswap32(env->regs[5]); in get_mcontext()
101 gr[TARGET_REG_R6] = tswap32(env->regs[6]); in get_mcontext()
143 const uint32_t *gr = mcp->__gregs; in set_mcontext() local
[all …]
/qemu/linux-user/hppa/
H A Dcpu_loop.c29 uint32_t which = env->gr[20]; in hppa_lws()
30 abi_ulong addr = env->gr[26]; in hppa_lws()
31 abi_ulong old = env->gr[25]; in hppa_lws()
32 abi_ulong new = env->gr[24]; in hppa_lws()
50 size = env->gr[23]; in hppa_lws()
106 env->gr[28] = ret; in hppa_lws()
125 env->gr[26], env->gr[25], in cpu_loop()
126 env->gr[24], env->gr[23], in cpu_loop()
127 env->gr[22], env->gr[21], 0, 0); in cpu_loop()
130 env->gr[28] = ret; in cpu_loop()
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H A Dtarget_cpu.h26 env->gr[30] = newsp; in cpu_clone_regs_child()
29 env->gr[28] = 0; in cpu_clone_regs_child()
31 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_clone_regs_child()
46 return state->gr[30]; in get_sp_from_cpustate()
H A Dsignal.c76 __put_user(env->gr[i], &sc->sc_gr[i]); in setup_sigcontext()
96 __get_user(env->gr[i], &sc->sc_gr[i]); in restore_sigcontext()
146 env->gr[2] = default_rt_sigreturn; in setup_rt_frame()
147 env->gr[30] = sp; in setup_rt_frame()
148 env->gr[26] = sig; in setup_rt_frame()
149 env->gr[25] = h2g(&frame->info); in setup_rt_frame()
150 env->gr[24] = h2g(&frame->uc); in setup_rt_frame()
163 __get_user(env->gr[19], fdesc + 1); in setup_rt_frame()
178 abi_ulong frame_addr = env->gr[30] - PARISC_RT_SIGFRAME_SIZE32; in do_rt_sigreturn()
H A Dtarget_syscall.h5 target_ulong gr[32]; member
/qemu/target/hppa/
H A Dsys_helper.c112 env->gr[1] = env->shadow[0]; in getshadowregs()
113 env->gr[8] = env->shadow[1]; in getshadowregs()
114 env->gr[9] = env->shadow[2]; in getshadowregs()
115 env->gr[16] = env->shadow[3]; in getshadowregs()
116 env->gr[17] = env->shadow[4]; in getshadowregs()
117 env->gr[24] = env->shadow[5]; in getshadowregs()
118 env->gr[25] = env->shadow[6]; in getshadowregs()
156 c = (unsigned char)env->gr[26]; in HELPER()
H A Dint_helper.c187 env->shadow[0] = env->gr[1]; in hppa_cpu_do_interrupt()
188 env->shadow[1] = env->gr[8]; in hppa_cpu_do_interrupt()
189 env->shadow[2] = env->gr[9]; in hppa_cpu_do_interrupt()
190 env->shadow[3] = env->gr[16]; in hppa_cpu_do_interrupt()
191 env->shadow[4] = env->gr[17]; in hppa_cpu_do_interrupt()
192 env->shadow[5] = env->gr[24]; in hppa_cpu_do_interrupt()
193 env->shadow[6] = env->gr[25]; in hppa_cpu_do_interrupt()
200 env->gr[24] = env->cr_back[0]; in hppa_cpu_do_interrupt()
201 env->gr[25] = env->cr_back[1]; in hppa_cpu_do_interrupt()
H A Dmem_helper.c712 env->gr[28] = -1; /* nonexistent procedure */ in HELPER()
716 env->gr[28] = 0; /* PDC_OK */ in HELPER()
718 switch (env->gr[25]) { in HELPER()
725 env->gr[28] = -10; /* invalid argument */ in HELPER()
738 phys_page = env->gr[22]; in HELPER()
739 len = env->gr[21]; in HELPER()
740 slot = env->gr[19]; in HELPER()
761 env->gr[28] = -10; /* invalid argument */ in HELPER()
766 slot = env->gr[22]; in HELPER()
773 env->gr[28] = -10; /* invalid argument */ in HELPER()
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H A Dgdbstub.c40 val = env->gr[n]; in hppa_cpu_gdb_read_register()
160 env->gr[n] = val; in hppa_cpu_gdb_write_register()
H A Dmachine.c173 VMSTATE_UINT64_ARRAY(gr, CPUHPPAState, 32),
H A Dhelper.c167 i, w, m & env->gr[i], in hppa_cpu_dump_state()
H A Dcpu.h207 target_ulong gr[32]; member
H A Dtranslate.c303 offsetof(CPUHPPAState, gr[i]), in hppa_translate_init()
/qemu/hw/display/
H A Dcirrus_vga.c597 (s->vga.gr[0x11] << 8) | (s->vga.gr[0x13] << 16); in cirrus_bitblt_fgcol()
602 (s->vga.gr[0x13] << 16) | (s->vga.gr[0x15] << 24); in cirrus_bitblt_fgcol()
621 (s->vga.gr[0x10] << 8) | (s->vga.gr[0x12] << 16); in cirrus_bitblt_bgcol()
626 (s->vga.gr[0x12] << 16) | (s->vga.gr[0x14] << 24); in cirrus_bitblt_bgcol()
858 s->vga.gr[0x31] &= in cirrus_bitblt_reset()
945 s->cirrus_blt_width = (s->vga.gr[0x20] | (s->vga.gr[0x21] << 8)) + 1; in cirrus_bitblt_start()
946 s->cirrus_blt_height = (s->vga.gr[0x22] | (s->vga.gr[0x23] << 8)) + 1; in cirrus_bitblt_start()
947 s->cirrus_blt_dstpitch = (s->vga.gr[0x24] | (s->vga.gr[0x25] << 8)); in cirrus_bitblt_start()
948 s->cirrus_blt_srcpitch = (s->vga.gr[0x26] | (s->vga.gr[0x27] << 8)); in cirrus_bitblt_start()
950 (s->vga.gr[0x28] | (s->vga.gr[0x29] << 8) | (s->vga.gr[0x2a] << 16)); in cirrus_bitblt_start()
[all …]
H A Dcirrus_vga_rop2.h53 int skipleft = s->vga.gr[0x2f] & 0x1f; in glue()
55 int skipleft = (s->vga.gr[0x2f] & 0x07) * (DEPTH / 8); in glue()
112 int dstskipleft = s->vga.gr[0x2f] & 0x1f; in glue()
115 int srcskipleft = s->vga.gr[0x2f] & 0x07; in glue()
160 int srcskipleft = s->vga.gr[0x2f] & 0x07; in glue()
195 int dstskipleft = s->vga.gr[0x2f] & 0x1f; in glue()
198 int srcskipleft = s->vga.gr[0x2f] & 0x07; in glue()
239 int srcskipleft = s->vga.gr[0x2f] & 0x07; in glue()
H A Dvga.c387 val = s->gr[s->gr_index]; in vga_ioport_read()
647 s->gr[VGA_GFX_MISC] = (s->gr[VGA_GFX_MISC] & ~0x0c) | 0x04 | in vbe_update_vgaregs()
674 s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) | in vbe_update_vgaregs()
826 plane = s->gr[VGA_GFX_PLANE_READ]; in vga_mem_readb()
853 if (!(s->gr[VGA_GFX_MODE] & 0x08)) { in vga_mem_readb()
957 write_mode = s->gr[VGA_GFX_MODE] & 3; in vga_mem_writeb()
962 b = s->gr[VGA_GFX_DATA_ROTATE] & 7; in vga_mem_writeb()
971 bit_mask = s->gr[VGA_GFX_BIT_MASK]; in vga_mem_writeb()
978 bit_mask = s->gr[VGA_GFX_BIT_MASK]; in vga_mem_writeb()
982 b = s->gr[VGA_GFX_DATA_ROTATE] & 7; in vga_mem_writeb()
[all …]
H A Dcirrus_vga_rop.h135 uint8_t transp = s->vga.gr[0x34]; in glue()
164 uint8_t transp = s->vga.gr[0x34]; in glue()
188 uint16_t transp = s->vga.gr[0x34] | (uint16_t)s->vga.gr[0x35] << 8; in glue()
217 uint16_t transp = s->vga.gr[0x34] | (uint16_t)s->vga.gr[0x35] << 8; in glue()
H A Dvga_int.h83 uint8_t gr[256]; member
/qemu/hw/hppa/
H A Dmachine.c473 cpu[0]->env.gr[24] = 0x4000; in machine_HP_common_init_tail()
504 cpu[0]->env.gr[23] = initrd_base; in machine_HP_common_init_tail()
522 cpu[0]->env.gr[26] = machine->ram_size; in machine_HP_common_init_tail()
523 cpu[0]->env.gr[25] = kernel_entry; in machine_HP_common_init_tail()
526 cpu[0]->env.gr[21] = smp_cpus; in machine_HP_common_init_tail()
529 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; in machine_HP_common_init_tail()
667 if (cpu[0]->env.gr[26] == ms->ram_size) { in hppa_machine_reset()
671 cpu[0]->env.gr[26] = ms->ram_size; in hppa_machine_reset()
673 cpu[0]->env.gr[24] = 'c'; in hppa_machine_reset()
675 cpu[0]->env.gr[21] = smp_cpus; in hppa_machine_reset()
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/qemu/hw/intc/
H A Dsh_intc.c295 struct intc_group *gr = &groups[i]; in sh_intc_register_source() local
297 for (k = 0; k < ARRAY_SIZE(gr->enum_ids); k++) { in sh_intc_register_source()
298 id = gr->enum_ids[k]; in sh_intc_register_source()
333 struct intc_group *gr = &groups[i]; in sh_intc_register_sources() local
335 id = gr->enum_id; in sh_intc_register_sources()
337 s->next_enum_id = gr->enum_ids[0]; in sh_intc_register_sources()
339 for (k = 1; k < ARRAY_SIZE(gr->enum_ids); k++) { in sh_intc_register_sources()
340 if (gr->enum_ids[k]) { in sh_intc_register_sources()
341 id = gr->enum_ids[k - 1]; in sh_intc_register_sources()
343 s->next_enum_id = gr->enum_ids[k]; in sh_intc_register_sources()
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/qemu/hw/net/
H A Dnpcm_gmac.c659 uint8_t pa, gr; in npcm_gmac_mdio_access() local
665 gr = NPCM_GMAC_MII_ADDR_GR(v); in npcm_gmac_mdio_access()
668 g_assert(gr < NPCM_GMAC_MAX_PHY_REGS); in npcm_gmac_mdio_access()
674 switch (gr) { in npcm_gmac_mdio_access()
690 gmac->phy_regs[pa][gr] = data; in npcm_gmac_mdio_access()
692 data = gmac->phy_regs[pa][gr]; in npcm_gmac_mdio_access()
696 gr, data); in npcm_gmac_mdio_access()
H A Dtrace-events473 … *name, uint8_t is_write, uint8_t pa, uint8_t gr, uint16_t val) "%s: is_write: %" PRIu8 " pa: %" P…
/qemu/
H A Dblock.c6240 gr->graph = g_new0(XDbgBlockGraph, 1); in xdbg_graph_new()
6243 return gr; in xdbg_graph_new()
6248 XDbgBlockGraph *graph = gr->graph; in xdbg_graph_finalize()
6250 g_hash_table_destroy(gr->graph_nodes); in xdbg_graph_finalize()
6251 g_free(gr); in xdbg_graph_finalize()
6268 ret = g_hash_table_size(gr->graph_nodes) + 1; in xdbg_graph_node_num()
6281 n->id = xdbg_graph_node_num(gr, node); in xdbg_graph_add_node()
6285 QAPI_LIST_PREPEND(gr->graph->nodes, n); in xdbg_graph_add_node()
6312 QAPI_LIST_PREPEND(gr->graph->edges, edge); in xdbg_graph_add_edge()
6358 xdbg_graph_add_edge(gr, bs, child); in bdrv_get_xdbg_block_graph()
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/qemu/docs/system/devices/
H A Dkeyboard.rst113 - gr
/qemu/linux-user/
H A Delfload.c1892 regs->gr[23] = 0; in init_thread()
1893 regs->gr[24] = infop->argv; in init_thread()
1894 regs->gr[25] = infop->argc; in init_thread()
1896 regs->gr[30] = infop->start_stack + 64; in init_thread()
1897 regs->gr[31] = infop->entry; in init_thread()