Searched refs:hcr (Results 1 – 7 of 7) sorted by relevance
210 uint64_t hcr = arm_hcr_el2_eff(env); in rebuild_hflags_a64() local303 if ((hcr & (HCR_NV | HCR_NV1)) != (HCR_NV | HCR_NV1)) { in rebuild_hflags_a64()340 if (el == 1 && (hcr & HCR_NV)) { in rebuild_hflags_a64()343 if (hcr & HCR_NV1) { in rebuild_hflags_a64()346 if (hcr & HCR_NV2) { in rebuild_hflags_a64()348 if (hcr & HCR_E2H) { in rebuild_hflags_a64()
1208 uint64_t hcr = arm_hcr_el2_eff(env); in HELPER() local1209 bool enabled = !(hcr & HCR_TGE) && (hcr & HCR_AMO); in HELPER()1210 bool pending = enabled && (hcr & HCR_VSE); in HELPER()
467 uint64_t hcr = arm_hcr_el2_eff(env); in pauth_check_trap() local468 bool trap = !(hcr & HCR_API); in pauth_check_trap()471 trap &= (hcr & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE); in pauth_check_trap()
496 if (hcr & HCR_FWB) { in S2_attrs_are_device()602 if ((hcr & HCR_PTW) && S2_attrs_are_device(hcr, pte_attrs)) { in S1_ptw_translate()2989 if (hcr & HCR_CD) { /* cache disabled */ in convert_stage2_attrs()3035 static uint8_t combined_attrs_nofwb(uint64_t hcr, in combined_attrs_nofwb() argument3146 static ARMCacheAttrs combine_cacheattrs(uint64_t hcr, in combine_cacheattrs() argument3173 if (hcr & HCR_FWB) { in combine_cacheattrs()3257 if (hcr & HCR_DC) { in get_phys_addr_disabled()3258 if (hcr & HCR_DCT) { in get_phys_addr_disabled()3299 uint64_t hcr; in get_phys_addr_twostage() local3357 hcr = arm_hcr_el2_eff_secstate(env, in_space); in get_phys_addr_twostage()[all …]
2494 uint64_t hcr; in gt_cntfrq_access() local2551 (hcr & HCR_E2H in gt_counter_access()2805 uint64_t hcr; in gt_virt_cnt_offset() local4925 if (hcr & HCR_E2H) { in vae2_tlbmask()4971 if (hcr & HCR_E2H) { in vae2_tlbbits()8141 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in access_mte()8181 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in access_tfsr_el2()8343 if (el == 0 && !((hcr & HCR_E2H) && (hcr & HCR_TGE))) { in access_scxtnum()10761 bool hcr; in arm_phys_excp_target_el() local11562 uint64_t hcr; in arm_cpu_do_interrupt_aarch64() local[all …]
777 bool hcr, scr; in arm_excp_unmasked() local788 hcr = hcr_el2 & HCR_FMO; in arm_excp_unmasked()797 scr = scr && !((env->cp15.scr_el3 & SCR_FW) && !hcr); in arm_excp_unmasked()807 hcr = hcr_el2 & HCR_IMO; in arm_excp_unmasked()814 if ((scr || hcr) && !secure) { in arm_excp_unmasked()1222 uint64_t hcr = arm_hcr_el2_eff(env); in aarch64_cpu_dump_state() local1261 (hcr & HCR_NV) ? " NV" : "", in aarch64_cpu_dump_state()1262 (hcr & HCR_NV1) ? " NV1" : "", in aarch64_cpu_dump_state()1263 (hcr & HCR_NV2) ? " NV2" : ""); in aarch64_cpu_dump_state()
1342 uint64_t hcr = arm_hcr_el2_eff(env); in allocation_tag_access_enabled() local1343 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in allocation_tag_access_enabled()