Searched refs:hcr_el2 (Results 1 – 8 of 8) sorted by relevance
649 env->cp15.hcr_el2 |= HCR_RW; in arm_emulate_firmware_reset()703 if (!(hcr_el2 & HCR_IMO) || (hcr_el2 & HCR_TGE)) { in arm_excp_unmasked()709 if (!(hcr_el2 & HCR_FMO) || (hcr_el2 & HCR_TGE)) { in arm_excp_unmasked()723 if (!(hcr_el2 & HCR_FMO) || (hcr_el2 & HCR_TGE)) { in arm_excp_unmasked()729 if (!(hcr_el2 & HCR_IMO) || (hcr_el2 & HCR_TGE)) { in arm_excp_unmasked()735 if (!(hcr_el2 & HCR_AMO) || (hcr_el2 & HCR_TGE)) { in arm_excp_unmasked()788 hcr = hcr_el2 & HCR_FMO; in arm_excp_unmasked()807 hcr = hcr_el2 & HCR_IMO; in arm_excp_unmasked()833 uint64_t hcr_el2 = arm_hcr_el2_eff(env); in arm_cpu_exec_interrupt() local919 env->cp15.hcr_el2 &= ~HCR_VSE; in arm_cpu_exec_interrupt()[all …]
30 route_to_el2 = env->cp15.hcr_el2 & HCR_TGE || in arm_debug_target_el()181 uint64_t hcr_el2; in linked_bp_matches() local202 hcr_el2 = arm_hcr_el2_eff(env); in linked_bp_matches()211 if (!(hcr_el2 & HCR_E2H)) { in linked_bp_matches()221 if ((hcr_el2 & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) { in linked_bp_matches()
213 uint64_t hcr_el2; in regime_translation_disabled() local240 hcr_el2 = arm_hcr_el2_eff_secstate(env, space); in regime_translation_disabled()241 return (hcr_el2 & (HCR_DC | HCR_VM)) == 0; in regime_translation_disabled()247 hcr_el2 = arm_hcr_el2_eff_secstate(env, space); in regime_translation_disabled()248 if (hcr_el2 & HCR_TGE) { in regime_translation_disabled()257 hcr_el2 = arm_hcr_el2_eff_secstate(env, space); in regime_translation_disabled()258 if (hcr_el2 & HCR_DC) { in regime_translation_disabled()
2020 if (hcr_el2 & HCR_IMO) { in isr_read()2039 if (hcr_el2 & HCR_FMO) { in isr_read()2053 if (hcr_el2 & HCR_AMO) { in isr_read()6054 env->cp15.hcr_el2 = value; in do_hcr_write()10765 uint64_t hcr_el2; in arm_phys_excp_target_el() local10778 hcr_el2 = arm_hcr_el2_eff(env); in arm_phys_excp_target_el()10783 hcr = hcr_el2 & HCR_IMO; in arm_phys_excp_target_el()10787 hcr = hcr_el2 & HCR_FMO; in arm_phys_excp_target_el()10791 hcr = hcr_el2 & HCR_AMO; in arm_phys_excp_target_el()12422 uint64_t hcr_el2; in fp_exception_el() local[all …]
332 uint64_t hcr_el2; /* Hypervisor configuration register */ member2572 aa64 = aa64 && (env->cp15.hcr_el2 & HCR_RW); in arm_el_is_aa64()
195 || (arm_el_is_aa64(env, 2) && !(env->cp15.hcr_el2 & HCR_TGE))) in rebuild_hflags_a32()313 if (env->cp15.hcr_el2 & HCR_TGE) { in rebuild_hflags_a64()
1007 undef = env->cp15.hcr_el2 & HCR_HCD; in HELPER()1236 env->cp15.hcr_el2 &= ~HCR_VSE; in HELPER()
100 uint64_t hcr_el2 = arm_hcr_el2_eff(env); in icv_access() local101 bool flagmatch = hcr_el2 & hcr_flags & (HCR_IMO | HCR_FMO); in icv_access()1925 uint64_t hcr_el2 = arm_hcr_el2_eff(env); in icc_dir_write() local1926 route_fiq_to_el2 = hcr_el2 & HCR_FMO; in icc_dir_write()1927 route_irq_to_el2 = hcr_el2 & HCR_IMO; in icc_dir_write()