| /qemu/target/microblaze/ |
| H A D | mmu.c | 82 unsigned int i, hit = 0; in mmu_translate() local
167 hit = 1; in mmu_translate()
174 vaddr, rw, tlb_wr, tlb_ex, hit); in mmu_translate()
175 return hit; in mmu_translate()
300 int hit; in mmu_write() local
308 hit = mmu_translate(cpu, &lu, v & TLB_EPN_MASK, in mmu_write()
310 if (hit) { in mmu_write()
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| H A D | helper.c | 46 unsigned int hit; in mb_cpu_tlb_fill() local
61 hit = mmu_translate(cpu, &lu, address, access_type, mmu_idx); in mb_cpu_tlb_fill()
62 if (likely(hit)) { in mb_cpu_tlb_fill()
235 unsigned int hit; in mb_cpu_get_phys_page_attrs_debug() local
242 hit = mmu_translate(cpu, &lu, addr, 0, 0); in mb_cpu_get_phys_page_attrs_debug()
243 if (hit) { in mb_cpu_get_phys_page_attrs_debug()
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| /qemu/hw/arm/ |
| H A D | trace-events | 18 …, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d vmid=%d addr=0x…
19 …, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d vmid=%d addr=0…
47 …, uint32_t misses, uint32_t perc) "Config cache HIT for sid=0x%x (hits=%d, misses=%d, hit rate=%d)"
48 … uint32_t misses, uint32_t perc) "Config cache MISS for sid=0x%x (hits=%d, misses=%d, hit rate=%d)"
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| /qemu/target/i386/tcg/sysemu/ |
| H A D | bpt_helper.c | 280 int i, hit = 0; in helper_bpt_io() local
288 hit |= 1 << i; in helper_bpt_io()
293 if (hit) { in helper_bpt_io()
294 env->dr[6] = (env->dr[6] & ~0xf) | hit; in helper_bpt_io()
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| /qemu/gdbstub/ |
| H A D | trace-events | 32 gdbstub_hit_watchpoint(const char *type, int cpu_gdb_index, uint64_t vaddr) "Watchpoint hit, type=\…
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| /qemu/docs/system/ppc/ |
| H A D | amigang.rst | 59 ``Onboard VIA IDE CDROM``. Then hit escape until the main screen appears again,
60 hit escape once more and from the exit menu that appears select either
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| /qemu/hw/i386/ |
| H A D | trace-events | 29 vtd_iotlb_page_hit(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) "IOTLB page hit si…
31 …, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen) "IOTLB context hit bus 0x%"PRIx8" devf…
98 amdvi_iotlb_hit(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) "hit iotlb…
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| /qemu/tests/qtest/ |
| H A D | migration-test.c | 3141 int hit = 0; in test_vcpu_dirty_limit() local
3191 hit = 1; in test_vcpu_dirty_limit()
3196 g_assert_cmpint(hit, ==, 1); in test_vcpu_dirty_limit()
3198 hit = 0; in test_vcpu_dirty_limit()
3213 hit = 1; in test_vcpu_dirty_limit()
3218 g_assert_cmpint(hit, ==, 1); in test_vcpu_dirty_limit()
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| /qemu/accel/tcg/ |
| H A D | cpu-exec.c | 272 goto hit; in tb_lookup()
283 hit: in tb_lookup()
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| /qemu/target/arm/ |
| H A D | ptw.c | 2592 bool hit = false; in pmsav8_mpu_lookup() local
2623 hit = true; in pmsav8_mpu_lookup()
2625 hit = true; in pmsav8_mpu_lookup()
2628 hit = true; in pmsav8_mpu_lookup()
2691 hit = true; in pmsav8_mpu_lookup()
2695 if (!hit) { in pmsav8_mpu_lookup()
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| /qemu/hw/net/rocker/ |
| H A D | rocker_of_dpa.c | 947 void (*hit)(OfDpaFlowContext *fc, OfDpaFlow *flow); member
973 .hit = of_dpa_bridging_learn,
993 .hit = of_dpa_acl_hit,
1030 if (ops->hit) { in of_dpa_flow_ig_tbl()
1031 ops->hit(fc, flow); in of_dpa_flow_ig_tbl()
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| /qemu/docs/specs/ |
| H A D | ppc-spapr-xive.rst | 129 In some cases (old host kernels or KVM nested guests), one may hit a
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| /qemu/docs/system/ |
| H A D | gdb.rst | 171 current instruction. This means you may hit the same breakpoint a number
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| /qemu/qapi/ |
| H A D | cxl.json | 246 # @reinit-threshold: REINIT threshold hit.
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| H A D | machine.json | 733 # hit latency.
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| /qemu/docs/devel/ |
| H A D | submitting-a-patch.rst | 577 their tree. Occasionally, the maintainer's pull request may hit more
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| /qemu/docs/interop/ |
| H A D | qcow2.txt | 59 hit other limits first (such as a file system's
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| /qemu/ |
| H A D | qemu-options.hx | 514 'access\|read\|write' hit latency or 'access\|read\|write' hit
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