/qemu/bsd-user/x86_64/ |
H A D | target_arch_cpu.h | 63 env->idt.limit = 511; in target_cpu_init() 65 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), in target_cpu_init() 67 bsd_x86_64_set_idt_base(env->idt.base); in target_cpu_init()
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/qemu/bsd-user/i386/ |
H A D | target_arch_cpu.h | 54 env->idt.limit = 255; in target_cpu_init() 56 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), in target_cpu_init() 58 bsd_i386_set_idt_base(env->idt.base); in target_cpu_init()
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/qemu/target/i386/tcg/sysemu/ |
H A D | smm_helper.c | 74 x86_stq_phys(cs, sm_state + 0x7e88, env->idt.base); in do_smm_enter() 75 x86_stl_phys(cs, sm_state + 0x7e84, env->idt.limit); in do_smm_enter() 139 x86_stl_phys(cs, sm_state + 0x7f58, env->idt.base); in do_smm_enter() 140 x86_stl_phys(cs, sm_state + 0x7f54, env->idt.limit); in do_smm_enter() 214 env->idt.base = x86_ldq_phys(cs, sm_state + 0x7e88); in helper_rsm() 215 env->idt.limit = x86_ldl_phys(cs, sm_state + 0x7e84); in helper_rsm() 287 env->idt.base = x86_ldl_phys(cs, sm_state + 0x7f58); in helper_rsm() 288 env->idt.limit = x86_ldl_phys(cs, sm_state + 0x7f54); in helper_rsm()
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H A D | svm_helper.c | 191 env->idt.base); in helper_vmrun() 193 env->idt.limit); in helper_vmrun() 353 env->vm_vmcb + offsetof(struct vmcb, save.idtr), &env->idt); in helper_vmrun() 777 env->idt.base); in do_vmexit() 779 env->idt.limit); in do_vmexit() 823 env->idt.base = x86_ldq_phys(cs, env->vm_hsave + offsetof(struct vmcb, in do_vmexit() 825 env->idt.limit = x86_ldl_phys(cs, env->vm_hsave + offsetof(struct vmcb, in do_vmexit()
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/qemu/linux-user/i386/ |
H A D | cpu_loop.c | 386 env->idt.limit = 511; in target_cpu_copy_regs() 388 env->idt.limit = 255; in target_cpu_copy_regs() 390 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), in target_cpu_copy_regs() 393 idt_table = g2h_untagged(env->idt.base); in target_cpu_copy_regs()
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/qemu/target/i386/ |
H A D | cpu-dump.c | 429 env->idt.base, env->idt.limit); in x86_cpu_dump_state() 445 (uint32_t)env->idt.base, env->idt.limit); in x86_cpu_dump_state()
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H A D | arch_dump.c | 259 QEMUCPUSegment ldt, tr, gdt, idt; member 317 copy_segment(&s->idt, &env->idt); in qemu_get_cpustate()
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H A D | machine.c | 1631 VMSTATE_SEGMENT(env.idt, X86CPU),
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H A D | cpu.h | 1648 SegmentCache idt; /* only base and limit are used */ member
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H A D | cpu.c | 7041 env->idt.limit = 0xffff; in x86_cpu_reset_hold()
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/qemu/contrib/elf2dmp/ |
H A D | qemu_elf.h | 27 QEMUCPUSegment ldt, tr, gdt, idt; member
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H A D | main.c | 551 printf("CPU #0 IDT is at 0x%016"PRIx64"\n", state->idt.base); in main() 553 if (!va_space_rw(&vs, state->idt.base, in main()
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/qemu/target/i386/tcg/user/ |
H A D | seg_helper.c | 54 dt = &env->idt; in do_interrupt_user()
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/qemu/target/i386/hvf/ |
H A D | x86hvf.c | 90 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); in hvf_put_segments() 91 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_BASE, env->idt.base); in hvf_put_segments() 198 env->idt.limit = rvmcs(cs->accel->fd, VMCS_GUEST_IDTR_LIMIT); in hvf_get_segments() 199 env->idt.base = rvmcs(cs->accel->fd, VMCS_GUEST_IDTR_BASE); in hvf_get_segments()
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/qemu/target/i386/kvm/ |
H A D | kvm.c | 2942 sregs.idt.limit = env->idt.limit; in kvm_put_sregs() 2943 sregs.idt.base = env->idt.base; in kvm_put_sregs() 2944 memset(sregs.idt.padding, 0, sizeof sregs.idt.padding); in kvm_put_sregs() 2989 sregs.idt.limit = env->idt.limit; in kvm_put_sregs2() 2990 sregs.idt.base = env->idt.base; in kvm_put_sregs2() 2991 memset(sregs.idt.padding, 0, sizeof sregs.idt.padding); in kvm_put_sregs2() 3702 env->idt.limit = sregs.idt.limit; in kvm_get_sregs() 3703 env->idt.base = sregs.idt.base; in kvm_get_sregs() 3745 env->idt.limit = sregs.idt.limit; in kvm_get_sregs2() 3746 env->idt.base = sregs.idt.base; in kvm_get_sregs2()
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/qemu/linux-headers/asm-x86/ |
H A D | kvm.h | 148 struct kvm_dtable gdt, idt; member 159 struct kvm_dtable gdt, idt; member
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/qemu/target/i386/whpx/ |
H A D | whpx-all.c | 440 vcxt.values[idx].Table.Base = env->idt.base; in whpx_set_registers() 441 vcxt.values[idx].Table.Limit = env->idt.limit; in whpx_set_registers() 664 env->idt.base = vcxt.values[idx].Table.Base; in whpx_get_registers() 665 env->idt.limit = vcxt.values[idx].Table.Limit; in whpx_get_registers()
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/qemu/target/i386/nvmm/ |
H A D | nvmm-all.c | 129 nvmm_set_segment(&state->segs[NVMM_X64_SEG_IDT], &env->idt); in nvmm_set_registers() 281 nvmm_get_segment(&env->idt, &state->segs[NVMM_X64_SEG_IDT]); in nvmm_get_registers()
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/qemu/target/i386/tcg/ |
H A D | seg_helper.c | 621 dt = &env->idt; in do_interrupt_protected() 884 dt = &env->idt; in do_interrupt64() 1050 dt = &env->idt; in do_interrupt_real()
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H A D | translate.c | 3686 tcg_gen_ld32u_tl(s->T0, tcg_env, offsetof(CPUX86State, idt.limit)); in disas_insn_old() 3689 tcg_gen_ld_tl(s->T0, tcg_env, offsetof(CPUX86State, idt.base)); in disas_insn_old() 3853 tcg_gen_st_tl(s->T0, tcg_env, offsetof(CPUX86State, idt.base)); in disas_insn_old() 3854 tcg_gen_st32_tl(s->T1, tcg_env, offsetof(CPUX86State, idt.limit)); in disas_insn_old()
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