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Searched refs:ier (Results 1 – 19 of 19) sorted by relevance

/qemu/hw/gpio/
H A Dmpc8xxx.c42 uint32_t ier; member
55 VMSTATE_UINT32(ier, MPC8XXXGPIOState),
64 qemu_set_irq(s->irq, !!(s->ier & s->imr)); in mpc8xxx_gpio_update()
85 return s->ier; in mpc8xxx_gpio_read()
137 s->ier &= ~value; in mpc8xxx_gpio_write()
157 s->ier = 0; in mpc8xxx_gpio_reset()
176 s->ier |= mask; in mpc8xxx_gpio_set_irq()
/qemu/hw/timer/
H A Dmss-timer.c62 bool isr, ier; in timer_update_irq() local
65 ier = !!(st->regs[R_TIM_CTRL] & TIMER_CTRL_INTR); in timer_update_irq()
66 qemu_set_irq(st->irq, (ier && isr)); in timer_update_irq()
93 int ier; in timer_read() local
114 ier = !!(st->regs[R_TIM_CTRL] & TIMER_CTRL_INTR); in timer_read()
115 ret = ier & isr; in timer_read()
/qemu/hw/char/
H A Dbcm2835_aux.c57 if ((s->ier & RX_INT) && s->read_count != 0) { in bcm2835_aux_update()
60 if (s->ier & TX_INT) { in bcm2835_aux_update()
93 return 0xc0 | s->ier; /* FIFO enables always read 1 */ in bcm2835_aux_read()
182 s->ier = value & (TX_INT | RX_INT); in bcm2835_aux_write()
268 VMSTATE_UINT8(ier, BCM2835AuxState),
H A Dserial.c122 if ((s->ier & UART_IER_RLSI) && (s->lsr & UART_LSR_INT_ANY)) { in serial_update_irq()
124 } else if ((s->ier & UART_IER_RDI) && s->timeout_ipending) { in serial_update_irq()
133 } else if ((s->ier & UART_IER_THRI) && s->thr_ipending) { in serial_update_irq()
368 uint8_t changed = (s->ier ^ val) & 0x0f; in serial_ioport_write()
369 s->ier = val & 0x0f; in serial_ioport_write()
374 if (s->ier & UART_IER_MSI) { in serial_ioport_write()
505 ret = s->ier; in serial_ioport_read()
693 if (s->ier & UART_IER_THRI) { in serial_thr_ipending_needed()
832 VMSTATE_UINT8(ier, SerialState),
864 s->ier = 0; in serial_reset()
[all …]
/qemu/hw/misc/
H A Dmos6522.c56 if (s->ifr & s->ier) { in mos6522_update_irq()
232 if ((s->ier & T1_INT) == 0 || (s->acr & T1MODE) != T1MODE_CONT) { in mos6522_timer1_update()
246 if ((s->ier & T2_INT) == 0) { in mos6522_timer2_update()
376 if (s->ifr & s->ier) { in mos6522_read()
381 val = s->ier | 0x80; in mos6522_read()
483 s->ier |= val & 0x7f; in mos6522_write()
486 s->ier &= ~val; in mos6522_write()
544 mos6522_reg_names[14], s->ier); in qmp_x_query_via_foreach()
637 VMSTATE_UINT8(ier, MOS6522State),
657 s->ier = 0; in mos6522_reset_hold()
/qemu/hw/intc/
H A Drx_icu.c83 enable = icu->ier[n_IRQ / 8] & (1 << (n_IRQ & 7)); in rxicu_request()
190 return icu->ier[reg]; in icu_read()
243 icu->ier[reg] = val; in icu_write()
351 VMSTATE_UINT8_ARRAY(ier, RXICUState, NR_IRQS / 8),
/qemu/hw/arm/
H A Dmusicpal.c832 uint32_t ier; member
895 ((level && (s->imr & mask)) || (!level && (s->ier & mask)))) { in musicpal_gpio_pin_event()
921 return s->ier & 0xFFFF; in musicpal_gpio_read()
923 return s->ier >> 16; in musicpal_gpio_read()
964 s->ier = (s->ier & 0xFFFF0000) | (value & 0xFFFF); in musicpal_gpio_write()
967 s->ier = (s->ier & 0xFFFF) | (value << 16); in musicpal_gpio_write()
992 s->ier = 0; in musicpal_gpio_reset()
1022 VMSTATE_UINT32(ier, musicpal_gpio_state),
/qemu/hw/net/can/
H A Dtrace-events2 xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) "ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x"
12 xlnx_canfd_update_irq(char *path, uint32_t isr, uint32_t ier, uint32_t irq) "%s: ISR: 0x%08x IER: 0…
/qemu/include/hw/char/
H A Dbcm2835_aux.h32 uint8_t ier, iir; member
H A Dserial.h45 uint8_t ier; member
/qemu/include/hw/intc/
H A Drx_icu.h59 uint8_t ier[NR_IRQS / 8]; member
/qemu/include/hw/net/
H A Dftgmac100.h39 uint32_t ier; member
/qemu/hw/ppc/
H A Dppc4xx_devs.c58 mal->ier = 0x00000000; in ppc4xx_mal_reset()
80 ret = mal->ier; in dcr_read_mal()
139 mal->ier = val & 0x0000001F; in dcr_write_mal()
/qemu/include/hw/misc/
H A Dmos6522.h144 uint8_t ier; member
/qemu/include/hw/ppc/
H A Dppc4xx.h57 uint32_t ier; member
/qemu/hw/net/
H A Dftgmac100.c255 qemu_set_irq(s->irq, s->isr & s->ier); in ftgmac100_update_irq()
670 s->ier = 0; in ftgmac100_do_reset()
713 return s->ier; in ftgmac100_read()
771 s->ier = value; in ftgmac100_write()
1125 VMSTATE_UINT32(ier, FTGMAC100State),
H A Dmsf2-emac.c96 uint32_t ier = s->regs[R_DMA_IRQ_MASK]; in emac_get_isr() local
101 s->regs[R_DMA_IRQ] = ier & isr; in emac_get_isr()
/qemu/hw/misc/macio/
H A Dtrace-events42 pmu_debug_protocol_cmd_resp_complete(int ier) "Response send complete. IER=0x%02x"
H A Dpmu.c621 trace_pmu_debug_protocol_cmd_resp_complete(ms->ier); in pmu_update()