Searched refs:intr_status (Results 1 – 9 of 9) sorted by relevance
86 xdma->regs[TO_REG(axc->intr_status)] |= axc->intr_complete; in aspeed_xdma_write()100 } else if (addr == axc->intr_status) { in aspeed_xdma_write()139 xdma->regs[TO_REG(axc->intr_status)] = XDMA_IRQ_ENG_STAT_RESET; in aspeed_xdma_reset()165 axc->intr_status = XDMA_AST2600_IRQ_STATUS; in aspeed_2600_xdma_class_init()188 axc->intr_status = XDMA_IRQ_ENG_STAT; in aspeed_2500_xdma_class_init()210 axc->intr_status = XDMA_IRQ_ENG_STAT; in aspeed_2400_xdma_class_init()
120 s->intr_status |= MPI_HIS_REPLY_MESSAGE_INTERRUPT; in mptsas_post_reply()123 s->intr_status |= MPI_HIS_DOORBELL_INTERRUPT; in mptsas_post_reply()138 s->intr_status |= MPI_HIS_DOORBELL_INTERRUPT; in mptsas_reply()155 s->intr_status |= MPI_HIS_REPLY_MESSAGE_INTERRUPT; in mptsas_turbo_reply()811 s->intr_status = 0; in mptsas_soft_reset()843 assert(s->intr_status & MPI_HIS_DOORBELL_INTERRUPT); in mptsas_doorbell_read()890 s->intr_status |= MPI_HIS_DOORBELL_INTERRUPT; in mptsas_doorbell_write()968 s->intr_status &= ~MPI_HIS_DOORBELL_INTERRUPT; in mptsas_interrupt_status_write()993 s->intr_status &= ~MPI_HIS_REPLY_MESSAGE_INTERRUPT; in mptsas_reply_post_read()1016 ret = s->intr_status; in mptsas_mmio_read()[all …]
59 uint32_t intr_status; member
42 uint8_t intr_status; member
267 (ohci->intr_status & ohci->intr)) in ohci_intr_update()276 ohci->intr_status |= intr; in ohci_set_interrupt()347 ohci->intr_status = 0; in ohci_soft_reset()1237 if (ohci->intr_status & OHCI_INTR_UE) { in ohci_frame_boundary()1250 if (ohci->done_count == 0 && !(ohci->intr_status & OHCI_INTR_WD)) { in ohci_frame_boundary()1254 if (ohci->intr & ohci->intr_status) { in ohci_frame_boundary()1343 ohci->intr_status &= ~OHCI_INTR_SF; in ohci_set_ctl()1538 retval = ohci->intr_status; in ohci_mem_read()1676 ohci->intr_status &= ~val; in ohci_mem_write()1999 VMSTATE_UINT32(intr_status, OHCIState),
53 uint32_t intr_status; member
76 bus->controller->intr_status |= 1 << bus->id; in aspeed_i2c_bus_raise_interrupt()89 bus->controller->intr_status |= 1 << bus->id; in aspeed_i2c_bus_raise_slave_interrupt()583 bus->controller->intr_status &= ~(1 << bus->id); in aspeed_i2c_bus_new_write()591 bus->controller->intr_status &= ~(1 << bus->id); in aspeed_i2c_bus_new_write()712 bus->controller->intr_status &= ~(1 << bus->id); in aspeed_i2c_bus_new_write()759 bus->controller->intr_status &= ~(1 << bus->id); in aspeed_i2c_bus_old_write()853 return s->intr_status; in aspeed_i2c_ctrl_read()959 VMSTATE_UINT32(intr_status, AspeedI2CState),972 s->intr_status = 0; in aspeed_i2c_reset()
31 aspeed_i2c_bus_cmd(uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) "hand…32 aspeed_i2c_bus_raise_interrupt(uint32_t intr_status, const char *s) "handled intr=0x%x %s"
256 uint32_t intr_status; member