Home
last modified time | relevance | path

Searched refs:irq_num (Results 1 – 25 of 44) sorted by relevance

12

/qemu/hw/intc/
H A Dloongarch_pch_msi.c27 int irq_num; in loongarch_msi_mem_write() local
33 irq_num = (val & 0xff) - s->irq_base; in loongarch_msi_mem_write()
34 trace_loongarch_msi_set_irq(irq_num); in loongarch_msi_mem_write()
35 assert(irq_num < s->irq_num); in loongarch_msi_mem_write()
36 qemu_set_irq(s->pch_msi_irq[irq_num], 1); in loongarch_msi_mem_write()
56 if (!s->irq_num || s->irq_num > PCH_MSI_IRQ_NUM) { in loongarch_pch_msi_realize()
61 s->pch_msi_irq = g_new(qemu_irq, s->irq_num); in loongarch_pch_msi_realize()
63 qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num); in loongarch_pch_msi_realize()
64 qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num); in loongarch_pch_msi_realize()
88 DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0),
H A Dppc-uic.c103 static void ppcuic_set_irq(void *opaque, int irq_num, int level) in ppcuic_set_irq() argument
108 mask = 1U << (31 - irq_num); in ppcuic_set_irq()
111 __func__, irq_num, level, in ppcuic_set_irq()
112 uic->uicsr, mask, uic->uicsr & mask, level << irq_num); in ppcuic_set_irq()
113 if (irq_num < 0 || irq_num > 31) { in ppcuic_set_irq()
135 "%08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, sr); in ppcuic_set_irq()
H A Dloongarch_pch_pic.c51 assert(irq < s->irq_num); in pch_pic_irq_handler()
95 val = deposit32(PCH_PIC_INT_ID_VER, 16, 16, s->irq_num - 1); in loongarch_pch_pic_low_readw()
386 if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { in loongarch_pch_pic_realize()
391 qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); in loongarch_pch_pic_realize()
392 qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); in loongarch_pch_pic_realize()
415 DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0),
/qemu/hw/pci-host/
H A Dsabre.c65 trace_sabre_set_request(irq_num); in sabre_set_request()
66 s->irq_request = irq_num; in sabre_set_request()
67 qemu_set_irq(s->ivec_irqs[irq_num], 1); in sabre_set_request()
103 trace_sabre_clear_request(irq_num); in sabre_clear_request()
104 qemu_set_irq(s->ivec_irqs[irq_num], 0); in sabre_clear_request()
275 return irq_num; in pci_sabre_map_irq()
305 trace_sabre_pci_set_irq(irq_num, level); in pci_sabre_set_irq()
308 if (irq_num < 32) { in pci_sabre_set_irq()
310 s->pci_irq_in |= 1ULL << irq_num; in pci_sabre_set_irq()
312 sabre_set_request(s, irq_num); in pci_sabre_set_irq()
[all …]
H A Dtrace-events7 grackle_set_irq(int irq_num, int level) "set_irq num %d level %d"
23 sabre_set_request(int irq_num) "request irq %d"
24 sabre_clear_request(int irq_num) "clear request irq %d"
29 sabre_pci_set_irq(int irq_num, int level) "set irq_in %d level %d"
30 sabre_pci_set_obio_irq(int irq_num, int level) "set irq %d level %d"
33 unin_set_irq(int irq_num, int level) "setting INT %d = %d"
41 ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
42 ppc4xx_pci_set_irq(int irq_num) "PCI irq %d"
45 ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d"
46 ppc440_pcix_set_irq(int irq_num) "PCI irq %d"
H A Dgrackle.c37 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) in pci_grackle_map_irq() argument
39 return (irq_num + (pci_dev->devfn >> 3)) & 3; in pci_grackle_map_irq()
42 static void pci_grackle_set_irq(void *opaque, int irq_num, int level) in pci_grackle_set_irq() argument
46 trace_grackle_set_irq(irq_num, level); in pci_grackle_set_irq()
47 qemu_set_irq(s->irqs[irq_num], level); in pci_grackle_set_irq()
H A Dppc4xx_pci.c256 static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int irq_num) in ppc4xx_pci_map_irq() argument
260 trace_ppc4xx_pci_map_irq(pci_dev->devfn, irq_num, slot); in ppc4xx_pci_map_irq()
265 static void ppc4xx_pci_set_irq(void *opaque, int irq_num, int level) in ppc4xx_pci_set_irq() argument
269 trace_ppc4xx_pci_set_irq(irq_num); in ppc4xx_pci_set_irq()
270 assert(irq_num >= 0 && irq_num < PPC4xx_PCI_NUM_DEVS); in ppc4xx_pci_set_irq()
271 qemu_set_irq(pci_irqs[irq_num], level); in ppc4xx_pci_set_irq()
H A Dgpex.c44 static void gpex_set_irq(void *opaque, int irq_num, int level) in gpex_set_irq() argument
48 qemu_set_irq(s->irq[irq_num], level); in gpex_set_irq()
57 s->irq_num[index] = gsi; in gpex_set_irq_num()
65 int gsi = s->irq_num[pin]; in gpex_route_intx_pin_to_irq()
133 s->irq_num[i] = -1; in gpex_host_realize()
H A Dversatile.c318 static int pci_vpb_map_irq(PCIDevice *d, int irq_num) in pci_vpb_map_irq() argument
326 return irq_num; in pci_vpb_map_irq()
343 return pci_swizzle_map_irq_fn(d, irq_num + 2); in pci_vpb_map_irq()
346 static int pci_vpb_rv_map_irq(PCIDevice *d, int irq_num) in pci_vpb_rv_map_irq() argument
360 return pci_swizzle_map_irq_fn(d, irq_num + 3); in pci_vpb_rv_map_irq()
363 static void pci_vpb_set_irq(void *opaque, int irq_num, int level) in pci_vpb_set_irq() argument
367 qemu_set_irq(pic[irq_num], level); in pci_vpb_set_irq()
H A Dsh_pci.c107 static int sh_pci_map_irq(PCIDevice *d, int irq_num) in sh_pci_map_irq() argument
112 static void sh_pci_set_irq(void *opaque, int irq_num, int level) in sh_pci_set_irq() argument
116 qemu_set_irq(pic[irq_num], level); in sh_pci_set_irq()
H A Dppc440_pcix.c426 static int ppc440_pcix_map_irq(PCIDevice *pci_dev, int irq_num) in ppc440_pcix_map_irq() argument
428 trace_ppc440_pcix_map_irq(pci_dev->devfn, irq_num, 0); in ppc440_pcix_map_irq()
432 static void ppc440_pcix_set_irq(void *opaque, int irq_num, int level) in ppc440_pcix_set_irq() argument
436 trace_ppc440_pcix_set_irq(irq_num); in ppc440_pcix_set_irq()
437 if (irq_num < 0) { in ppc440_pcix_set_irq()
438 error_report("%s: PCI irq %d", __func__, irq_num); in ppc440_pcix_set_irq()
H A Duninorth.c34 static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) in pci_unin_map_irq() argument
36 return (irq_num + (pci_dev->devfn >> 3)) & 3; in pci_unin_map_irq()
39 static void pci_unin_set_irq(void *opaque, int irq_num, int level) in pci_unin_set_irq() argument
43 trace_unin_set_irq(irq_num, level); in pci_unin_set_irq()
44 qemu_set_irq(s->irqs[irq_num], level); in pci_unin_set_irq()
H A Dbonito.c554 static void pci_bonito_set_irq(void *opaque, int irq_num, int level) in pci_bonito_set_irq() argument
559 int internal_irq = irq_num - BONITO_IRQ_BASE; in pci_bonito_set_irq()
573 static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num) in pci_bonito_map_irq() argument
581 return irq_num % 4 + BONITO_IRQ_BASE; in pci_bonito_map_irq()
587 return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE; in pci_bonito_map_irq()
589 return irq_num; in pci_bonito_map_irq()
H A Draven.c207 static int raven_map_irq(PCIDevice *pci_dev, int irq_num) in raven_map_irq() argument
209 return (irq_num + (pci_dev->devfn >> 3)) & 1; in raven_map_irq()
212 static void raven_set_irq(void *opaque, int irq_num, int level) in raven_set_irq() argument
216 qemu_set_irq(s->pci_irqs[irq_num], level); in raven_set_irq()
/qemu/hw/alpha/
H A Ddp264.c37 static int clipper_pci_map_irq(PCIDevice *d, int irq_num) in clipper_pci_map_irq() argument
41 assert(irq_num >= 0 && irq_num <= 3); in clipper_pci_map_irq()
43 return (slot + 1) * 4 + irq_num; in clipper_pci_map_irq()
/qemu/include/hw/pci-host/
H A Dppce500.h4 static inline int ppce500_pci_map_irq_slot(int devno, int irq_num) in ppce500_pci_map_irq_slot() argument
6 return (devno + irq_num) % 4; in ppce500_pci_map_irq_slot()
H A Dgpex.h64 int irq_num[GPEX_NUM_IRQS]; member
/qemu/hw/tpm/
H A Dtpm_tis_isa.c95 DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ),
125 if (s->irq_num > 15) { in tpm_tis_isa_realizefn()
127 s->irq_num); in tpm_tis_isa_realizefn()
131 s->irq = isa_get_irq(ISA_DEVICE(dev), s->irq_num); in tpm_tis_isa_realizefn()
/qemu/stubs/
H A Dxen-hw-stub.c13 int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) in xen_pci_slot_get_pirq() argument
18 void xen_intx_set_irq(void *opaque, int irq_num, int level) in xen_intx_set_irq() argument
/qemu/include/hw/xen/
H A Dxen.h40 int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num);
42 void xen_intx_set_irq(void *opaque, int irq_num, int level);
/qemu/hw/pci/
H A Dpci.c293 d->irq_state |= level << irq_num; in pci_set_irq_state()
298 assert(irq_num >= 0); in pci_bus_change_irq_level()
299 assert(irq_num < bus->nirq); in pci_bus_change_irq_level()
300 bus->irq_count[irq_num] += change; in pci_bus_change_irq_level()
301 bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0); in pci_bus_change_irq_level()
308 int dev_irq = irq_num; in pci_change_irq_level()
311 irq_num = bus->map_irq(pci_dev, irq_num); in pci_change_irq_level()
324 assert(irq_num >= 0); in pci_bus_get_irq_level()
325 assert(irq_num < bus->nirq); in pci_bus_get_irq_level()
326 return !!bus->irq_count[irq_num]; in pci_bus_get_irq_level()
[all …]
/qemu/hw/i386/xen/
H A Dxen-hvm.c68 int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) in xen_pci_slot_get_pirq() argument
70 return irq_num + (PCI_SLOT(pci_dev->devfn) << 2); in xen_pci_slot_get_pirq()
73 void xen_intx_set_irq(void *opaque, int irq_num, int level) in xen_intx_set_irq() argument
75 xen_set_pci_intx_level(xen_domid, 0, 0, irq_num >> 2, in xen_intx_set_irq()
76 irq_num & 3, level); in xen_intx_set_irq()
/qemu/include/hw/intc/
H A Dloongarch_pch_msi.h24 unsigned int irq_num; member
H A Dloongarch_pch_pic.h68 unsigned int irq_num; member
/qemu/hw/usb/
H A Dvt82c686-uhci-pci.c6 static void uhci_isa_set_irq(void *opaque, int irq_num, int level) in uhci_isa_set_irq() argument

12