| /qemu/scripts/ |
| H A D | cpu-x86-uarch-abi.py | 128 for level in range(len(levels)):
130 want = set(levels[level])
135 models[name]["levels"][level] = match
147 for level in range(len(levels)):
148 if models[name]["levels"][level]:
149 abi_models[level].append(name)
152 for level in range(len(abi_models)):
155 for name in abi_models[level]:
174 if not models[name]["levels"][level]:
179 models[name]["delta"][level] = delta
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| H A D | checkpatch.pl | 698 my $level = 0;
761 $level++;
765 $level--;
775 $level++;
779 $level--;
782 if ($level == 0) {
891 my $level = 0;
892 my @stack = ($level);
916 $level--;
919 $level++;
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| /qemu/hw/arm/ |
| H A D | smmu-internal.h | 45 #define is_reserved_pte(pte, level) \ argument
46 ((level == 3) && \
53 #define is_table_pte(pte, level) \ argument
54 ((level < 3) && \
57 #define is_page_pte(pte, level) \ argument
58 ((level == 3) && \
86 static inline int level_shift(int level, int granule_sz) in level_shift() argument
88 return granule_sz + (3 - level) * (granule_sz - 3); in level_shift()
91 static inline uint64_t level_page_mask(int level, int granule_sz) in level_page_mask() argument
93 return ~(MAKE_64BIT_MASK(0, level_shift(level, granule_sz))); in level_page_mask()
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| H A D | smmu-common.c | 56 (k1->level == k2->level) && (k1->tg == k2->tg) && in smmu_iotlb_key_equal()
64 .tg = tg, .level = level}; in smmu_get_iotlb_key()
78 while (level <= 3) { in smmu_iotlb_lookup()
89 level++; in smmu_iotlb_lookup()
324 while (level < VMSA_LEVELS) { in smmu_ptw_64_s1()
344 if (is_table_pte(pte, level)) { in smmu_ptw_64_s1()
352 level++; in smmu_ptw_64_s1()
388 tlbe->level = level; in smmu_ptw_64_s1()
444 while (level < VMSA_LEVELS) { in smmu_ptw_64_s2()
465 level++; in smmu_ptw_64_s2()
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| /qemu/hw/i2c/ |
| H A D | bitbang_i2c.c | 68 i2c->device_out = level; in bitbang_i2c_ret()
70 return level & i2c->last_data; in bitbang_i2c_ret()
84 if (level != 0 && level != 1) { in bitbang_i2c_set()
92 i2c->last_data = level; in bitbang_i2c_set()
96 if (level == 0) { in bitbang_i2c_set()
108 if (i2c->last_clock == level) { in bitbang_i2c_set()
111 i2c->last_clock = level; in bitbang_i2c_set()
112 if (level == 0) { in bitbang_i2c_set()
205 level = bitbang_i2c_set(&s->bitbang, irq, level); in bitbang_i2c_gpio_set()
206 if (level != s->last_level) { in bitbang_i2c_gpio_set()
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| /qemu/hw/ppc/ |
| H A D | ppc.c | 54 if (level) { in ppc_set_irq()
82 if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) { in ppc6xx_set_irq()
89 if (level) { in ppc6xx_set_irq()
119 if (level) { in ppc6xx_set_irq()
126 if (level) { in ppc6xx_set_irq()
138 if (level) in ppc6xx_set_irq()
162 if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) { in ppc970_set_irq()
215 if (level) in ppc970_set_irq()
351 if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) { in ppc40x_set_irq()
403 if (level) in ppc40x_set_irq()
[all …]
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| /qemu/target/i386/hvf/ |
| H A D | x86_mmu.c | 77 int level, bool pae) in get_pt_entry() argument
82 uint64_t gpa = pt->pte[level] & page_mask; in get_pt_entry()
85 gpa = pt->pte[level]; in get_pt_entry()
88 index = gpt_entry(pt->gva, level, pae); in get_pt_entry()
92 pt->pte[level - 1] = pte; in get_pt_entry()
101 uint64_t pte = pt->pte[level]; in test_pt_entry()
121 if (1 == level && pte_large_page(pte)) { in test_pt_entry()
125 if (!level) { in test_pt_entry()
172 int top_level, level; in walk_gpt() local
186 for (level = top_level; level > 0; level--) { in walk_gpt()
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| /qemu/hw/gpio/ |
| H A D | max7310.c | 27 uint8_t level; member
40 s->level &= s->direction; in max7310_reset()
53 return s->level ^ s->polarity; in max7310_rx()
56 return s->level & ~s->direction; in max7310_rx()
99 for (diff = (data ^ s->level) & ~s->direction; diff; in max7310_tx()
105 s->level = (s->level & s->direction) | (data & ~s->direction); in max7310_tx()
113 s->level &= ~(s->direction ^ data); in max7310_tx()
161 VMSTATE_UINT8(level, MAX7310State),
176 if (level) in max7310_gpio_set()
177 s->level |= s->direction & (1 << line); in max7310_gpio_set()
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| H A D | zaurus.c | 66 uint32_t level, diff; in scoop_gpio_handler_update() local
68 level = s->gpio_level & s->gpio_dir; in scoop_gpio_handler_update()
70 for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) { in scoop_gpio_handler_update()
72 qemu_set_irq(s->handler[bit], (level >> bit) & 1); in scoop_gpio_handler_update()
75 s->prev_level = level; in scoop_gpio_handler_update()
167 static void scoop_gpio_set(void *opaque, int line, int level) in scoop_gpio_set() argument
171 if (level) { in scoop_gpio_set()
196 uint32_t level; in scoop_post_load() local
198 level = s->gpio_level & s->gpio_dir; in scoop_post_load()
201 qemu_set_irq(s->handler[i], (level >> i) & 1); in scoop_post_load()
[all …]
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| /qemu/hw/misc/ |
| H A D | tz-ppc.c | 28 trace_tz_ppc_update_irq(level); in tz_ppc_update_irq()
29 qemu_set_irq(s->irq, level); in tz_ppc_update_irq()
38 s->cfg_nonsec[n] = level; in tz_ppc_cfg_nonsec()
46 trace_tz_ppc_cfg_ap(n, level); in tz_ppc_cfg_ap()
47 s->cfg_ap[n] = level; in tz_ppc_cfg_ap()
55 s->cfg_sec_resp = level; in tz_ppc_cfg_sec_resp()
62 trace_tz_ppc_irq_enable(level); in tz_ppc_irq_enable()
63 s->irq_enable = level; in tz_ppc_irq_enable()
71 trace_tz_ppc_irq_clear(level); in tz_ppc_irq_clear()
73 s->irq_clear = level; in tz_ppc_irq_clear()
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| H A D | tz-msc.c | 26 bool level = s->irq_status; in tz_msc_update_irq() local
28 trace_tz_msc_update_irq(level); in tz_msc_update_irq()
29 qemu_set_irq(s->irq, level); in tz_msc_update_irq()
32 static void tz_msc_cfg_nonsec(void *opaque, int n, int level) in tz_msc_cfg_nonsec() argument
36 trace_tz_msc_cfg_nonsec(level); in tz_msc_cfg_nonsec()
37 s->cfg_nonsec = level; in tz_msc_cfg_nonsec()
44 trace_tz_msc_cfg_sec_resp(level); in tz_msc_cfg_sec_resp()
45 s->cfg_sec_resp = level; in tz_msc_cfg_sec_resp()
52 trace_tz_msc_irq_clear(level); in tz_msc_irq_clear()
54 s->irq_clear = level; in tz_msc_irq_clear()
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| /qemu/hw/intc/ |
| H A D | rx_icu.c | 90 static void rxicu_set_irq(void *opaque, int n_IRQ, int level) in rxicu_set_irq() argument
103 level = (level != 0); in rxicu_set_irq()
107 issue = level; in rxicu_set_irq()
108 src->level = level; in rxicu_set_irq()
111 issue = (level == 0 && src->level == 1); in rxicu_set_irq()
112 src->level = level; in rxicu_set_irq()
115 issue = (level == 1 && src->level == 0); in rxicu_set_irq()
116 src->level = level; in rxicu_set_irq()
119 issue = ((level ^ src->level) & 1); in rxicu_set_irq()
120 src->level = level; in rxicu_set_irq()
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| H A D | aspeed_vic.c | 59 static void aspeed_vic_set_irq(void *opaque, int irq, int level) in aspeed_vic_set_irq() argument
71 trace_aspeed_vic_set_irq(irq, level); in aspeed_vic_set_irq()
78 raise = level; in aspeed_vic_set_irq()
81 raise = !level; in aspeed_vic_set_irq()
85 uint64_t old_level = s->level & irq_mask; in aspeed_vic_set_irq()
89 raise = (!!old_level) != (!!level); in aspeed_vic_set_irq()
93 raise = !old_level && level; in aspeed_vic_set_irq()
96 raise = old_level && !level; in aspeed_vic_set_irq()
103 s->level = deposit64(s->level, irq, 1, level); in aspeed_vic_set_irq()
298 s->level = 0; in aspeed_vic_reset()
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| H A D | pl190.c | 31 uint32_t level; member
58 uint32_t level = pl190_irq_level(s); in pl190_update() local
61 set = (level & s->prio_mask[s->priority]) != 0; in pl190_update()
63 set = ((s->level | s->soft_level) & s->fiq_select) != 0; in pl190_update()
67 static void pl190_set_irq(void *opaque, int irq, int level) in pl190_set_irq() argument
71 if (level) in pl190_set_irq()
72 s->level |= 1u << irq; in pl190_set_irq()
74 s->level &= ~(1u << irq); in pl190_set_irq()
117 return (s->level | s->soft_level) & s->fiq_select; in pl190_read()
119 return s->level | s->soft_level; in pl190_read()
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| H A D | bcm2836_control.c | 141 int level) in bcm2836_control_set_local_irq() argument
158 static void bcm2836_control_set_local_irq0(void *opaque, int core, int level) in bcm2836_control_set_local_irq0() argument
160 bcm2836_control_set_local_irq(opaque, core, IRQ_CNTPSIRQ, level); in bcm2836_control_set_local_irq0()
163 static void bcm2836_control_set_local_irq1(void *opaque, int core, int level) in bcm2836_control_set_local_irq1() argument
165 bcm2836_control_set_local_irq(opaque, core, IRQ_CNTPNSIRQ, level); in bcm2836_control_set_local_irq1()
170 bcm2836_control_set_local_irq(opaque, core, IRQ_CNTHPIRQ, level); in bcm2836_control_set_local_irq2()
175 bcm2836_control_set_local_irq(opaque, core, IRQ_CNTVIRQ, level); in bcm2836_control_set_local_irq3()
178 static void bcm2836_control_set_gpu_irq(void *opaque, int irq, int level) in bcm2836_control_set_gpu_irq() argument
182 s->gpu_irq = level; in bcm2836_control_set_gpu_irq()
187 static void bcm2836_control_set_gpu_fiq(void *opaque, int irq, int level) in bcm2836_control_set_gpu_fiq() argument
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| H A D | ppc-uic.c | 103 static void ppcuic_set_irq(void *opaque, int irq_num, int level) in ppcuic_set_irq() argument
111 __func__, irq_num, level, in ppcuic_set_irq()
112 uic->uicsr, mask, uic->uicsr & mask, level << irq_num); in ppcuic_set_irq()
121 if (level == 1) { in ppcuic_set_irq()
126 if (level == 1) { in ppcuic_set_irq()
128 uic->level |= mask; in ppcuic_set_irq()
131 uic->level &= ~mask; in ppcuic_set_irq()
135 "%08" PRIx32 "\n", __func__, irq_num, level, uic->uicsr, sr); in ppcuic_set_irq()
197 uic->uicsr |= uic->level; in dcr_write_uic()
273 VMSTATE_UINT32(level, PPCUIC),
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| /qemu/target/xtensa/ |
| H A D | exc_helper.c | 87 unsigned level = env->config->debug_level; in HELPER() local
91 env->sregs[EPC1 + level - 1] = pc; in HELPER()
92 env->sregs[EPS2 + level - 2] = env->sregs[PS]; in HELPER()
94 (level << PS_INTLEVEL_SHIFT); in HELPER()
163 int level = env->pending_irq_level; in handle_interrupt() local
165 if ((level > xtensa_get_cintlevel(env) && in handle_interrupt()
166 level <= env->config->nlevel && in handle_interrupt()
167 (env->config->level_mask[level] & in handle_interrupt()
169 level == env->config->nmi_level) { in handle_interrupt()
172 if (level > 1) { in handle_interrupt()
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| /qemu/pc-bios/s390-ccw/ |
| H A D | bootmap.c | 699 int level = 0; in iso_get_file_size() local
707 while (level >= 0) { in iso_get_file_size()
713 if (sec_offset[level] == 0) { in iso_get_file_size()
716 if (dir_rem[level] == 0) { in iso_get_file_size()
731 dir_rem[level] -= ISO_SECTOR_SIZE - sec_offset[level]; in iso_get_file_size()
732 sec_offset[level] = 0; in iso_get_file_size()
733 sec_loc[level]++; in iso_get_file_size()
748 level++; in iso_get_file_size()
751 dir_rem[level] = 0; in iso_get_file_size()
757 if (dir_rem[level] == 0) { in iso_get_file_size()
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| /qemu/ui/ |
| H A D | vnc-enc-zywrle.h | 337 int level, int l) in filter_wavelet_square() argument
344 m = &(zywrle_param[level - 1][l]); in filter_wavelet_square()
413 int level, int l) in filter_wavelet_square() argument
420 m = zywrle_param[level - 1][l]; in filter_wavelet_square()
444 static inline void wavelet(int *buf, int width, int height, int level) in wavelet() argument
450 for (l = 0; l < level; l++) { in wavelet()
465 filter_wavelet_square(buf, width, height, level, l); in wavelet()
569 s = 2 << level; \
653 static inline void zywrle_calc_size(int *w, int *h, int level) in zywrle_calc_size() argument
655 *w &= ~((1 << level) - 1); in zywrle_calc_size()
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| /qemu/tests/unit/ |
| H A D | test-throttle.c | 48 bkt.level = 1.5; in test_leak_bucket()
54 g_assert(double_cmp(bkt.level, 0.5)); in test_leak_bucket()
60 g_assert(double_cmp(bkt.level, 0)); in test_leak_bucket()
66 g_assert(double_cmp(bkt.level, 0)); in test_leak_bucket()
97 bkt.level = 1.5; in test_compute_wait()
104 bkt.level = 15; in test_compute_wait()
111 bkt.level = 9; in test_compute_wait()
118 bkt.level = 15.5; in test_compute_wait()
126 bkt.level = 0; in test_compute_wait()
131 bkt.level += units; in test_compute_wait()
[all …]
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| /qemu/hw/audio/ |
| H A D | pl041.c | 64 uint32_t level; member
179 if (fifo->level < s->fifo_depth) { in pl041_fifo1_write()
197 fifo->data[fifo->level++] = value; in pl041_fifo1_write()
207 if ((fifo->level + 2) < s->fifo_depth) { in pl041_fifo1_write()
238 if (fifo->level > 0) { in pl041_fifo1_write()
242 if (fifo->level >= (s->fifo_depth / 2)) { in pl041_fifo1_write()
246 if (fifo->level >= s->fifo_depth) { in pl041_fifo1_write()
262 if (fifo->level >= (s->fifo_depth / 2)) { in pl041_fifo1_transmit()
282 fifo->level -= written_samples; in pl041_fifo1_transmit()
296 if (fifo->level == 0) { in pl041_fifo1_transmit()
[all …]
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| /qemu/hw/mips/ |
| H A D | mips_int.c | 29 static void cpu_mips_irq_request(void *opaque, int irq, int level) in cpu_mips_irq_request() argument
41 if (level) { in cpu_mips_irq_request()
48 kvm_mips_set_interrupt(cpu, irq, level); in cpu_mips_irq_request()
71 void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level) in cpu_mips_soft_irq() argument
77 qemu_set_irq(env->irq[irq], level); in cpu_mips_soft_irq()
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| /qemu/target/arm/ |
| H A D | internals.h | 567 int level; member
670 assert(fi->level >= -1 && fi->level <= 3); in arm_fi_to_lfsc()
671 if (fi->level < 0) { in arm_fi_to_lfsc()
674 fsc = fi->level; in arm_fi_to_lfsc()
678 assert(fi->level >= 0 && fi->level <= 3); in arm_fi_to_lfsc()
682 assert(fi->level >= 0 && fi->level <= 3); in arm_fi_to_lfsc()
686 assert(fi->level >= -1 && fi->level <= 3); in arm_fi_to_lfsc()
687 if (fi->level < 0) { in arm_fi_to_lfsc()
697 assert(fi->level >= -1 && fi->level <= 3); in arm_fi_to_lfsc()
709 assert(fi->level >= -1 && fi->level <= 3); in arm_fi_to_lfsc()
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| /qemu/hw/xtensa/ |
| H A D | pic_cpu.c | 41 int level; in check_interrupts() local
46 for (level = env->config->nlevel; level > minlevel; --level) { in check_interrupts()
47 if (env->config->level_mask[level] & int_set_enabled) { in check_interrupts()
48 env->pending_irq_level = level; in check_interrupts()
55 __func__, level, xtensa_get_cintlevel(env), in check_interrupts()
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| /qemu/scripts/qapi/ |
| H A D | introspect.py | 98 level: int = 0,
110 def indent(level: int) -> str:
111 return level * 4 * ' '
122 ret += indent(level) + f"/* {obj.comment} */\n"
125 ret += _tree_to_qlit(obj.value, level)
132 ret += indent(level)
147 ret += indent(level + 1) + '{}\n'
148 ret += indent(level) + '}))'
156 ret += indent(level + 1) + '{}\n'
157 ret += indent(level) + '}))'
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