/qemu/tests/tcg/s390x/ |
H A D | laalg.c | 11 unsigned long cc = 0, op1, op2 = 40, op3 = 2; in main() local 19 : [op3] "r" (op3) in main()
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H A D | csst.c | 14 uint64_t op3 = op1; in main() local 24 [op3] "+r" (op3), in main()
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/qemu/target/ppc/translate/ |
H A D | fp-ops.c.inc | 16 #define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \ 17 GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type)
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H A D | fp-impl.c.inc | 124 #define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \
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/qemu/target/i386/tcg/ |
H A D | decode-new.h | 261 X86OpType op3:8; member
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H A D | decode-new.c.inc | 170 .op3 = X86_TYPE_I, .s3 = X86_SIZE_b, \ 1997 if (e->op3 != X86_TYPE_None) { 2002 assert(e->op3 == X86_TYPE_I && e->s3 == X86_SIZE_b); 2021 if (e->op3 != X86_TYPE_None) {
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H A D | emit.c.inc | 688 int op3, SSEFunc_0_epppp xmm, SSEFunc_0_epppp ymm) 694 tcg_gen_addi_ptr(ptr3, tcg_env, ZMM_OFFSET(op3));
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/qemu/target/hexagon/idef-parser/ |
H A D | parser-helpers.h | 288 HexValue *op3);
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H A D | parser-helpers.c | 1611 HexValue *op3) in gen_carry_from_add() argument 1618 HexValue op3_m = rvalue_materialize(c, locp, op3); in gen_carry_from_add()
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/qemu/disas/ |
H A D | sparc.c | 356 #define COMMUTEOP(opcode, op3, arch_mask) \ argument 357 { opcode, F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0), "1,2,d", 0, arch_mask }, \ 358 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "1,i,d", 0, arch_mask }, \ 359 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "i,1,d", 0, arch_mask }
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/qemu/target/ppc/ |
H A D | translate.c | 1423 #define GEN_OPCODE(name, op1, op2, op3, invl, _typ, _typ2) \ argument 1427 .opc3 = op3, \ 1437 #define GEN_OPCODE_DUAL(name, op1, op2, op3, invl1, invl2, _typ, _typ2) \ argument 1441 .opc3 = op3, \ 1452 #define GEN_OPCODE2(name, onam, op1, op2, op3, invl, _typ, _typ2) \ argument 1456 .opc3 = op3, \ 1466 #define GEN_OPCODE3(name, op1, op2, op3, op4, invl, _typ, _typ2) \ argument 1470 .opc3 = op3, \ 1480 #define GEN_OPCODE4(name, onam, op1, op2, op3, op4, invl, _typ, _typ2) \ argument 1484 .opc3 = op3, \
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/qemu/target/i386/hvf/ |
H A D | x86_decode.c | 430 struct x86_decode_op *op3);
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/qemu/target/arm/tcg/ |
H A D | translate-a64.c | 5711 int op3 = extract32(insn, 10, 6); in disas_data_proc_reg() local 5731 switch (op3) { in disas_data_proc_reg()
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