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Searched refs:pcie (Results 1 – 25 of 27) sorted by relevance

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/qemu/docs/config/
H A Dq35-virtio-serial.cfg79 [device "pcie.1"]
81 bus = "pcie.0"
87 [device "pcie.2"]
89 bus = "pcie.0"
96 bus = "pcie.0"
103 bus = "pcie.0"
110 bus = "pcie.0"
117 bus = "pcie.0"
124 bus = "pcie.0"
131 bus = "pcie.0"
[all …]
H A Dq35-virtio-graphical.cfg74 [device "pcie.1"]
76 bus = "pcie.0"
82 [device "pcie.2"]
84 bus = "pcie.0"
91 bus = "pcie.0"
98 bus = "pcie.0"
105 bus = "pcie.0"
112 bus = "pcie.0"
119 bus = "pcie.0"
126 bus = "pcie.0"
[all …]
H A Dmach-virt-graphical.cfg125 bus = "pcie.0"
133 bus = "pcie.0"
140 bus = "pcie.0"
147 bus = "pcie.0"
154 bus = "pcie.0"
161 bus = "pcie.0"
168 bus = "pcie.0"
175 bus = "pcie.0"
198 bus = "pcie.1"
238 bus = "pcie.2"
[all …]
H A Dmach-virt-serial.cfg129 [device "pcie.1"]
131 bus = "pcie.0"
139 bus = "pcie.0"
146 bus = "pcie.0"
153 bus = "pcie.0"
160 bus = "pcie.0"
167 bus = "pcie.0"
174 bus = "pcie.0"
181 bus = "pcie.0"
204 bus = "pcie.1"
[all …]
H A Dq35-emulated.cfg82 bus = "pcie.0"
90 bus = "pcie.0"
98 bus = "pcie.0"
106 bus = "pcie.0"
122 bus = "pcie.0"
172 bus = "pcie.0"
178 bus = "pcie.0"
186 bus = "pcie.0"
194 bus = "pcie.0"
208 bus = "pcie.0"
[all …]
/qemu/docs/
H A Dpcie.txt37 2.1 Root Bus (pcie.0)
60 pcie.0 bus
70 -device pxb-pcie,id=pcie.1,bus_nr=x[,numa_node=y][,addr=z]
74 -device pcie-pci-bridge,id=pcie_pci_bridge1,bus=pcie.1
95 pcie.0 bus
119 -device pcie-root-port,id=root_port2,chassis=x1,addr=z.1[,slot=y1][,bus=pcie.0] \
122 -device pcie-root-port,id=root_port1,chassis=x,slot=y[,bus=pcie.0][,addr=z] \
147 pcie.0 bus
165 -device pcie-pci-bridge,id=pcie_pci_bridge1[,bus=pcie.0] \
222 The PCI Express root buses (pcie.0 and the buses exposed by pxb-pcie devices)
[all …]
H A Dpcie_pci_bridge.txt63 (-device pcie-root-port). Capability construction function takes all reservation
73 -device pcie-root-port,bus=pcie.0,id=rp1,slot=1 \
74 -device pcie-root-port,bus=pcie.0,id=rp2,slot=2 \
75 -device pcie-root-port,bus=pcie.0,id=rp3,slot=3,bus-reserve=1 \
76 -device pcie-pci-bridge,id=br1,bus=rp1 \
77 -device pcie-pci-bridge,id=br2,bus=rp2 \
81 device_add pcie-pci-bridge,id=br3,bus=rp3 \
98 The PCIE-PCI bridge can be hot-plugged only into pcie-root-port that
H A Dbypass-iommu.txt31 qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
42 -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1 \
43 -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x3.0x2,bypass_iommu=true \
55 -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3 \
56 -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x4,bypass_iommu=true \
H A Dpcie_sriov.txt43 #include "hw/pci/pcie.h"
/qemu/docs/system/ppc/
H A Dpowernv.rst79 -device e1000e,netdev=net0,mac=C0:FF:EE:00:00:02,bus=pcie.0,addr=0x0 \
89 -device ich9-ahci,id=sata0,bus=pcie.1,addr=0x0 \
102 -device e1000e,netdev=net0,mac=C0:FF:EE:00:00:02,bus=pcie.0,addr=0x0
105 -device megasas,id=scsi0,bus=pcie.0,addr=0x0
117 -device megasas,id=scsi0,bus=pcie.0,addr=0x0 \
121 -device pcie-pci-bridge,id=bridge1,bus=pcie.1,addr=0x0 \
137 -device virtio-blk-pci,drive=drive0,id=blk0,bus=pcie.0 \
140 -device virtio-net-pci,netdev=netdev0,id=net0,bus=pcie.1 \
143 -device virtio-9p-pci,fsdev=fsdev0,mount_tag=host,bus=pcie.2
/qemu/hw/arm/
H A Dfsl-imx6.c108 object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST); in fsl_imx6_init()
435 sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); in fsl_imx6_realize()
436 sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX6_PCIe_REG_ADDR); in fsl_imx6_realize()
439 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); in fsl_imx6_realize()
441 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); in fsl_imx6_realize()
443 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); in fsl_imx6_realize()
445 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); in fsl_imx6_realize()
H A Dfsl-imx7.c152 object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST); in fsl_imx7_init()
597 sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); in fsl_imx7_realize()
598 sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX7_PCIE_REG_ADDR); in fsl_imx7_realize()
601 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); in fsl_imx7_realize()
603 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); in fsl_imx7_realize()
605 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); in fsl_imx7_realize()
607 sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); in fsl_imx7_realize()
/qemu/hw/i386/
H A Dmicrovm.c230 if (x86_machine_is_acpi_enabled(x86ms) && mms->pcie == ON_OFF_AUTO_ON) { in microvm_devices_init()
510 OnOffAuto pcie = mms->pcie; in microvm_machine_get_pcie() local
512 visit_type_OnOffAuto(v, name, &pcie, errp); in microvm_machine_get_pcie()
520 visit_type_OnOffAuto(v, name, &mms->pcie, errp); in microvm_machine_set_pcie()
614 mms->pcie = ON_OFF_AUTO_AUTO; in microvm_machine_initfn()
H A Dacpi-microvm.c95 if (mms->pcie != ON_OFF_AUTO_ON) { in acpi_dsdt_add_pci()
/qemu/include/hw/i386/
H A Dmicrovm.h88 OnOffAuto pcie; member
/qemu/hw/pci/
H A Dmeson.build17 pci_ss.add(files('pcie.c', 'pcie_aer.c'))
H A Dtrace-events20 # pcie.c
H A Dpci.c2643 ObjectClass *pcie = in pci_device_class_base_init() local
2647 assert(conventional || pcie || cxl); in pci_device_class_base_init()
/qemu/docs/system/devices/
H A Dcxl.rst309 -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
319 -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
330 -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
349 -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
350 -device pxb-cxl,bus_nr=222,bus=pcie.0,id=cxl.2 \
373 -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
H A Dcan.rst189 …acing for Intel/Altera Cyclone IV based board <https://gitlab.fel.cvut.cz/canbus/pcie-ctu_can_fd>`_
/qemu/hw/pci-host/
H A Dmeson.build9 pci_ss.add(when: 'CONFIG_PCI_EXPRESS_XILINX', if_true: files('xilinx-pcie.c'))
/qemu/include/hw/arm/
H A Dfsl-imx7.h87 DesignwarePCIEHost pcie; member
H A Dfsl-imx6.h75 DesignwarePCIEHost pcie; member
/qemu/docs/specs/
H A Dpci-ids.rst84 PCIe Expander Bridge (-device pxb-pcie)
/qemu/docs/devel/migration/
H A Dcompatibility.rst402 + DEFINE_PROP_BIT("x-pcie-err-unc-mask", PCIDevice, cap_present,
450 + { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" },

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