| /qemu/target/tricore/ |
| H A D | translate.c | 3236 int r1, r2; in decode_srr_opc() local
3330 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_ssr_opc()
3337 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 1); in decode_ssr_opc()
3344 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2); in decode_ssr_opc()
3351 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_ssr_opc()
3415 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_slr_opc()
3422 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 1); in decode_slr_opc()
3429 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2); in decode_slr_opc()
3436 tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); in decode_slr_opc()
3445 int r2; in decode_sro_opc() local
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| H A D | op_helper.c | 278 result = r1 + r2; in helper_add64_ssov()
434 result = r1 - r2; in helper_sub64_ssov()
703 ret = mul + r2; in helper_madd64_ssov()
860 ret = mul + r2; in helper_madd64_suov()
866 if (ret < r2) { in helper_madd64_suov()
925 ret = r2 - mul; in helper_msub64_ssov()
926 ovf = (ret ^ r2) & (mul ^ r2); in helper_msub64_ssov()
956 ret = r2 - mul; in helper_msub64_suov()
962 if (ret > r2) { in helper_msub64_suov()
1887 r2 = r2 >> 1; in helper_bmerge()
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| /qemu/tcg/ |
| H A D | tci.c | 117 *r2 = extract32(insn, 16, 4); in tci_args_rrr()
141 *r2 = extract32(insn, 16, 4); in tci_args_rrrc()
150 *r2 = extract32(insn, 16, 4); in tci_args_rrrbb()
160 *r2 = extract32(insn, 16, 4); in tci_args_rrrrr()
170 *r2 = extract32(insn, 16, 4); in tci_args_rrrr()
179 *r2 = extract32(insn, 16, 4); in tci_args_rrrrrc()
190 *r2 = extract32(insn, 16, 4); in tci_args_rrrrrr()
375 TCGReg r0, r1, r2, r3, r4, r5; in tcg_qemu_tb_exec() local
823 T1 = regs[r2] + regs[r4]; in tcg_qemu_tb_exec()
832 T1 = regs[r2] - regs[r4]; in tcg_qemu_tb_exec()
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| /qemu/tests/tcg/arm/system/ |
| H A D | boot.S | 123 and r2, r1, r2
124 orr r2, r2, r3 /* common bits */
125 orr r2, r2, #(1 << 15) /* AP[2] = 1 */
126 orr r2, r2, #(1 << 10) /* AP[0] = 1 => RO @ PL1 */
128 lsr r4, r2, #(20 - 2)
129 str r2, [r0, r4, lsl #0] /* write entry */
134 and r2, r1, r2
135 orr r2, r2, r3 /* common bits */
136 orr r2, r2, #(1 << 10) /* AP[0] = 1 => RW @ PL1 */
137 orr r2, r2, #(1 << 4) /* XN[4] => no execute */
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| /qemu/target/riscv/ |
| H A D | insn32.decode | 48 &r2 rd rs1
77 @r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd
280 fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2
284 fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2
287 fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2
317 fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2
326 fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2
329 fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2
761 rev8_32 011010 011000 ..... 101 ..... 0010011 @r2
770 clz 011000 000000 ..... 001 ..... 0010011 @r2
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| H A D | xthead.decode | 27 &r2 rd rs1 !extern
38 @r2 ....... ..... ..... ... ..... ....... &r2 %rs1 %rd
65 th_ff0 1000010 00000 ..... 001 ..... 0001011 @r2
66 th_ff1 1000011 00000 ..... 001 ..... 0001011 @r2
69 th_rev 1000001 00000 ..... 001 ..... 0001011 @r2
70 th_revw 1001000 00000 ..... 001 ..... 0001011 @r2
71 th_tstnbz 1000000 00000 ..... 001 ..... 0001011 @r2
114 th_fmv_hw_x 1010000 00000 ..... 001 ..... 0001011 @r2
115 th_fmv_x_hw 1100000 00000 ..... 001 ..... 0001011 @r2
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| /qemu/tests/tcg/arm/ |
| H A D | test-arm-iwmmxt.S | 8 ldr r2, =data2
16 wldrd wr0, [r2, #0]
17 wldrd wr1, [r2, #8]
20 wstrd wr0, [r2, #0]
21 wstrd wr1, [r2, #8]
29 ldfe f0, [r2, #0]
30 ldfe f1, [r2, #8]
33 stfe f0, [r2, #0]
34 stfe f1, [r2, #8]
37 mov r1, r2
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| /qemu/tests/tcg/cris/bare/ |
| H A D | check_movemr.s | 18 move.d mem1,r2
19 move.d [r2],r3
28 move.d mem1,r2
29 move.d [r2+],r3
33 move.w [r2+],r3
37 move.b [r2+],r3
41 move.d [r2+],r3
45 movs.b [r2],r3
49 movu.b [r2+],r3
53 movu.w [r2],r3
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| H A D | check_moverm.s | 18 move.d mem1,r2
21 move.d r4,[r2+]
23 subq 4,r2
24 move.d [r2],r3
35 move.d mem2,r2
39 move.b r4,[r2+]
41 subq 1,r2
42 move.d [r2],r3
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| /qemu/pc-bios/s390-ccw/ |
| H A D | start.S | 22 larl %r2,bss_start_literal /* __bss_start might be unaligned ... */
23 lg %r2,0(%r2) /* ... so load it indirectly */
25 slgr %r3,%r2 /* get sizeof bss */
31 lgr %r1,%r2
38 larl %r2,memsetxc
39 ex %r3,0(%r2)
42 larl %r2,disabled_wait_psw
43 mvc 0x01d0(16),0(%r2)
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| /qemu/tests/tcg/hexagon/ |
| H A D | test_bitcnt.S | 17 r2 = cl0(r0) define
20 p0 = cmp.eq(r2, #23); if (p0.new) jump:t test2
26 r2 = cl0(r1:0) define
29 p0 = cmp.eq(r2, #55); if (p0.new) jump:t test3
35 r2 = ct0(r0) define
38 p0 = cmp.eq(r2, #1); if (p0.new) jump:t pass
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| H A D | test_hwloops.S | 9 r2 = #0 define
13 r2 = add(r2, #1) define
17 p0 = cmp.eq(r2, #10); if (p0.new) jump:t pass
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| H A D | test_round.S | 15 r2 = round(r1, #4) define
18 p0 = cmp.eq(r2, #13); if (p0.new) jump:t test2
24 r2 = cround(r1, #4) define
27 p0 = cmp.eq(r2, #12); if (p0.new) jump:t pass
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| H A D | test_lsr.S | 12 r2 = #0x19 define
15 r0 &= lsr(r1, r2)
28 r2 = #-1 define
31 r1:0 = lsl(r1:0, r2)
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| H A D | test_dotnew.S | 19 r2 = #3 define
20 memw(sp+#8) = r2.new
29 r2 = memw(sp+#0) define
32 r3 = mpyi(r1, r2)
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| /qemu/tests/tcg/s390x/ |
| H A D | ex-relative-long.c | 63 register long r2 asm("r2"); \
67 r2 = reg; \
74 : [target] "=&a" (target), [r2] "+r" (r2), [pm] "=r" (pm) \
77 reg = r2; \
86 register long r2 asm("r2"); \
90 r2 = reg; \
96 : [r2] "+r" (r2), [pm] "=r" (pm) \
99 reg = r2; \
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| H A D | epsw.c | 11 unsigned long r1 = 0x1234567887654321UL, r2 = 0x8765432112345678UL; in main() local
15 : [r1] "+r" (r1), [r2] "+r" (r2) : : "cc"); in main()
20 assert(r2 == 0x8765432180000000UL); in main()
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| H A D | exrl-trtr.c | 9 register uint64_t r2 asm("r2") = 0xffffffffffffffffull; in main()
26 [r2] "+r" (r2), in main()
41 if (r2 != 0xffffffffffffffbbull) { in main()
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| H A D | exrl-trt.c | 9 register uint64_t r2 asm("r2") = 0xffffffffffffffffull; in main()
26 [r2] "+r" (r2), in main()
41 if (r2 != 0xffffffffffffffaaull) { in main()
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| H A D | clst.c | 8 const char *r2 = *s2; in clst() local
17 : [r1] "+r" (r1), [r2] "+r" (r2), "+r" (r0), [cc] "=r" (cc) in clst()
21 *s2 = r2; in clst()
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| H A D | cdsg.c | 25 register unsigned long r2 asm("r2"); in cdsg()
31 r2 = new0; in cdsg()
39 : [r2] "r" (r2) in cdsg()
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| H A D | locfhr.c | 10 locfhr(long r1, long r2, int m3, int cc) in locfhr() argument
16 : [cc] "r" (cc), [r2] "r" (r2), [m3] "i" (m3) in locfhr()
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| /qemu/common-user/host/s390x/ |
| H A D | safe-syscall.inc.S | 56 lgr %r8,%r2 /* signal_pending pointer */
58 lgr %r2,%r4 /* syscall args */
84 clgr %r2, %r0
86 lcr %r2, %r2 /* create positive errno */
94 lghi %r2, QEMU_ERESTARTSYS
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| /qemu/target/hppa/ |
| H A D | insns.decode | 74 &rrr t r1 r2
75 &rrr_cf t r1 r2 cf
76 &rrr_cf_d t r1 r2 cf d
77 &rrr_sh t r1 r2 sh
78 &rrr_cf_d_sh t r1 r2 cf d sh
83 &rrb_c_f disp n c f r1 r2
84 &rrb_c_d_f disp n c d f r1 r2
471 &fclass2 r1 r2 c y
472 &fclass3 r1 r2 t
490 &fclass2 r1=%ra64 r2=%rb64
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| H A D | op_helper.c | 364 uint64_t HELPER(hadd_ss)(uint64_t r1, uint64_t r2) in HELPER()
370 int f2 = sextract64(r2, i, 16); in HELPER()
380 uint64_t HELPER(hadd_us)(uint64_t r1, uint64_t r2) in HELPER()
386 int f2 = sextract64(r2, i, 16); in HELPER()
396 uint64_t HELPER(havg)(uint64_t r1, uint64_t r2) in HELPER()
402 int f2 = extract64(r2, i, 16); in HELPER()
410 uint64_t HELPER(hsub_ss)(uint64_t r1, uint64_t r2) in HELPER()
416 int f2 = sextract64(r2, i, 16); in HELPER()
432 int f2 = sextract64(r2, i, 16); in HELPER()
448 int f2 = sextract64(r2, i, 16); in HELPER()
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