/qemu/target/rx/ |
H A D | insns.decode | 24 &rr rd rs 25 &ri rd imm 86 # ABS rd 88 # ABS rs, rd 93 # ADC rs, rd 434 # NEG rd 441 # NOT rd 463 # POP rd 491 # ROLC rd 493 # RORC rd [all …]
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H A D | disas.c | 349 prt("pop\tr%d", a->rd); in trans_POP() 519 if (a->rs != a->rd) { in trans_NOT_rr() 531 if (a->rs != a->rd) { in trans_NEG_rr() 647 if (a->rs != a->rd) { in trans_ABS_rr() 773 if (a->rs2 != a->rd) { in trans_SHLL_irr() 792 if (a->rs2 != a->rd) { in trans_SHAR_irr() 811 if (a->rs2 != a->rd) { in trans_SHLR_irr() 829 prt("rorc\tr%d", a->rd); in trans_ROLC() 836 prt("rorc\tr%d", a->rd); in trans_RORC() 917 prt("bra.l\tr%d", a->rd); in trans_BRA_l() [all …]
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H A D | translate.c | 630 if (a->rd == 0 || a->rd >= a->rd2) { in trans_POPM() 840 rx_gen_op_irr(rx_and, a->rd, a->rd, a->imm); in trans_AND_ir() 870 rx_gen_op_irr(rx_or, a->rd, a->rd, a->imm); in trans_OR_ir() 899 rx_gen_op_irr(rx_xor, a->rd, a->rd, a->imm); in trans_XOR_ir() 920 rx_gen_op_irr(rx_tst, a->rd, a->rd, a->imm); in trans_TST_ir() 981 rx_gen_op_irr(rx_adc, a->rd, a->rd, a->imm); in trans_ADC_ir() 988 rx_gen_op_rrr(rx_adc, a->rd, a->rd, a->rs); in trans_ADC_rr() 1088 rx_gen_op_irr(rx_sub, a->rd, a->rd, a->imm); in trans_SUB_ir() 1110 rx_gen_op_rrr(rx_sbb, a->rd, a->rd, a->rs); in trans_SBB_rr() 1253 rx_gen_op_irr(rx_div, a->rd, a->rd, a->imm); in trans_DIV_ir() [all …]
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/qemu/target/avr/ |
H A D | disas.c | 135 INSN(ADIW, "r%d:r%d, %d", a->rd + 1, a->rd, a->imm) 140 INSN(SBIW, "r%d:r%d, %d", a->rd + 1, a->rd, a->imm) 146 INSN(COM, "r%d", a->rd) 147 INSN(NEG, "r%d", a->rd) 148 INSN(INC, "r%d", a->rd) 149 INSN(DEC, "r%d", a->rd) 186 INSN(MOVW, "r%d:r%d, r%d:r%d", a->rd + 1, a->rd, a->rr + 1, a->rr) 218 INSN(PUSH, "r%d", a->rd) 219 INSN(POP, "r%d", a->rd) 228 INSN(LSR, "r%d", a->rd) [all …]
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H A D | insn.decode | 26 %rd 4:5 42 &rd_rr rd rr 43 &rd_imm rd imm 45 @op_rd_rr .... .. . ..... .... &rd_rr rd=%rd rr=%rr 66 COM 1001 010 rd:5 0000 67 NEG 1001 010 rd:5 0001 68 INC 1001 010 rd:5 0011 69 DEC 1001 010 rd:5 1010 118 @io_rd_imm .... . .. ..... .... &rd_imm rd=%rd imm=%io_imm 131 LDX1 1001 000 rd:5 1100 [all …]
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/qemu/target/sparc/ |
H A D | insns.decode | 21 SETHI 00 rd:5 100 i:22 38 &r_r_ri rd rs1 rs2_or_imm imm:bool 47 &r_r_r rd rs1 rs2 50 &r_r_r rd=%dfp_rd 66 &r_r rd rs 84 &r_r_r_r rd rs1 rs2 rs3 243 &shiftr rd rs1 rs2 x:bool 250 &shifti rd rs1 i x:bool 345 rd=%dfp_rd rs2=%dfp_rs2 347 rd=%qfp_rd rs2=%qfp_rs2 [all …]
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/qemu/target/mips/tcg/ |
H A D | tx79_translate.c | 122 if (a->rd == 0) { in trans_parallel_arith() 239 if (a->rd == 0) { in trans_parallel_compare() 421 if (a->rd == 0) { in trans_PPACW() 452 if (a->rd == 0) { in trans_PEXTLx() 501 if (a->rd == 0) { in trans_PEXTLW() 511 gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); in trans_PEXTLW() 520 if (a->rd == 0) { in trans_PEXTUW() 530 gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); in trans_PEXTUW() 570 tcg_gen_deposit_i64(cpu_gpr[a->rd], cpu_gpr[a->rd], cpu_gpr[a->rd], 32, 32); in trans_PCPYH() 572 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], 32, 32); in trans_PCPYH() [all …]
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H A D | translate_addr_const.c | 16 bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int sa) in gen_lsa() argument 21 if (rd == 0) { in gen_lsa() 30 tcg_gen_add_tl(cpu_gpr[rd], t0, t1); in gen_lsa() 31 tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]); in gen_lsa() 35 bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int sa) in gen_dlsa() argument 42 if (rd == 0) { in gen_dlsa() 51 tcg_gen_add_tl(cpu_gpr[rd], t0, t1); in gen_dlsa()
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/qemu/target/riscv/ |
H A D | insn16.decode | 20 %rd 7:5 56 &r rd rs1 rs2 !extern 57 &i imm rs1 rd !extern 59 &j imm rd !extern 61 &u imm rd !extern 62 &shift shamt rs1 rd !extern 63 &r2 rd rs1 !extern 70 @cr .... ..... ..... .. &r rs2=%rs2_5 rs1=%rd %rd 71 @ci ... . ..... ..... .. &i imm=%imm_ci rs1=%rd %rd 90 @c_jalr ... . ..... ..... .. &i imm=0 rs1=%rd [all …]
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/qemu/target/riscv/insn_trans/ |
H A D | trans_rvd.c.inc | 95 gen_set_fpr_d(ctx, a->rd, dest); 113 gen_set_fpr_d(ctx, a->rd, dest); 131 gen_set_fpr_d(ctx, a->rd, dest); 353 REQUIRE_EVEN(ctx, a->rd); 376 gen_set_gpr(ctx, a->rd, dest); 391 gen_set_gpr(ctx, a->rd, dest); 406 gen_set_gpr(ctx, a->rd, dest); 458 REQUIRE_EVEN(ctx, a->rd); 475 REQUIRE_EVEN(ctx, a->rd); 539 REQUIRE_EVEN(ctx, a->rd); [all …]
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H A D | trans_rvzfh.c.inc | 59 dest = cpu_fpr[a->rd]; 99 gen_set_fpr_hs(ctx, a->rd, dest); 468 gen_set_gpr(ctx, a->rd, dest); 482 gen_set_gpr(ctx, a->rd, dest); 497 gen_set_gpr(ctx, a->rd, dest); 510 gen_set_gpr(ctx, a->rd, dest); 524 gen_set_gpr(ctx, a->rd, dest); 538 gen_set_gpr(ctx, a->rd, dest); 590 gen_set_gpr(ctx, a->rd, dest); 602 gen_nanbox_h(cpu_fpr[a->rd], cpu_fpr[a->rd]); [all …]
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H A D | trans_rvzfa.c.inc | 75 gen_set_fpr_hs(ctx, a->rd, dest); 124 gen_set_fpr_d(ctx, a->rd, dest); 225 gen_set_fpr_d(ctx, a->rd, dest); 398 gen_set_gpr(ctx, a->rd, dst); 414 gen_set_gpr(ctx, a->rd, dst); 444 gen_set_gpr(ctx, a->rd, dest); 459 gen_set_gpr(ctx, a->rd, dest); 474 gen_set_gpr(ctx, a->rd, dest); 489 gen_set_gpr(ctx, a->rd, dest); 504 gen_set_gpr(ctx, a->rd, dest); [all …]
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H A D | trans_rvf.c.inc | 52 dest = cpu_fpr[a->rd]; 97 gen_set_fpr_hs(ctx, a->rd, dest); 397 gen_set_gpr(ctx, a->rd, dest); 411 gen_set_gpr(ctx, a->rd, dest); 429 gen_set_gpr(ctx, a->rd, dest); 443 gen_set_gpr(ctx, a->rd, dest); 457 gen_set_gpr(ctx, a->rd, dest); 471 gen_set_gpr(ctx, a->rd, dest); 484 gen_set_gpr(ctx, a->rd, dest); 545 gen_set_gpr(ctx, a->rd, dest); [all …]
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/qemu/target/arm/tcg/ |
H A D | crypto_helper.c | 186 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in crypto_sha1_3reg() 258 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() 302 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() 337 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() 363 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() 382 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() 442 rd[0] = d0; in HELPER() 443 rd[1] = d1; in HELPER() 498 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() 526 union CRYPTO_STATE d = { .l = { rd[0], rd[1] } }; in HELPER() [all …]
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H A D | sve.decode | 65 &rr_esz rd rn esz 66 &rri rd rn imm 67 &rr_dbm rd rn dbm 68 &rrri rd rn rm imm 69 &rri_esz rd rn imm esz 71 &rrr_esz rd rn rm esz 73 &rpr_esz rd pg rn esz 74 &rpr_s rd pg rn s 75 &rprr_s rd pg rn rm s 81 &ptrue rd esz pat s [all …]
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H A D | a32.decode | 28 &s_rri_rot s rn rd imm rot 29 &s_rrrr s rd rn rm ra 30 &rrrr rd rn rm ra 31 &rrr_rot rd rn rm rot 32 &rrr rd rn rm 33 &rr rd rm 34 &ri rd imm 38 &mrs_reg rd r 40 &mrs_bank rd r sysm 47 &bfi rd rn lsb msb [all …]
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/qemu/tests/tcg/loongarch64/ |
H A D | test_bit.c | 8 uint64_t rd = 0; \ 11 : "=r"(rd) \ 14 return rd; \ 20 uint64_t rd = 0; \ 23 : "=r"(rd) \ 26 return rd; \ 32 uint64_t rd = 0; \ 35 : "=r"(rd) \ 38 return rd; \ 44 uint64_t rd = 0; \ [all …]
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/qemu/tests/tcg/mips/user/ase/dsp/ |
H A D | test_dsp_r1_cmp_eq_ph.c | 6 int rd, rs, rt; in main() local 15 : "=r"(rd) in main() 19 rd = (rd >> 24) & 0x03; in main() 20 assert(rd == result); in main() 28 : "=r"(rd) in main() 31 rd = (rd >> 24) & 0x03; in main() 32 assert(rd == result); in main()
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H A D | test_dsp_r1_cmp_le_ph.c | 6 int rd, rs, rt; in main() local 15 : "=r"(rd) in main() 19 rd = (rd >> 24) & 0x03; in main() 20 assert(rd == result); in main() 28 : "=r"(rd) in main() 31 rd = (rd >> 24) & 0x03; in main() 32 assert(rd == result); in main()
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H A D | test_dsp_r1_cmp_lt_ph.c | 6 int rd, rs, rt; in main() local 15 : "=r"(rd) in main() 19 rd = (rd >> 24) & 0x03; in main() 20 assert(rd == result); in main() 28 : "=r"(rd) in main() 31 rd = (rd >> 24) & 0x03; in main() 32 assert(rd == result); in main()
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H A D | test_dsp_r1_addq_s_ph.c | 6 int rd, rs, rt; in main() local 15 : "=r"(rd) in main() 18 assert(result == rd); in main() 25 : "=r"(rd) in main() 28 assert(result == rd); in main() 41 : "=r"(rd) in main() 44 assert(result == rd); in main() 57 : "=r"(rd) in main() 60 assert(result == rd); in main()
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H A D | test_dsp_r1_subq_s_w.c | 6 int rd, rs, rt, dsp; in main() local 18 : "=r"(rd), "=r"(dsp) in main() 23 assert(rd == result); in main() 34 : "=r"(rd), "=r"(dsp) in main() 39 assert(rd == result); in main() 50 : "=r"(rd), "=r"(dsp) in main() 55 assert(rd == result); in main() 66 : "=r"(rd), "=r"(dsp) in main() 71 assert(rd == result); in main()
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H A D | test_dsp_r1_absq_s_w.c | 6 int rd, rt; in main() local 13 : "=r"(rd) in main() 16 assert(rd == result); in main() 22 : "=r"(rd) in main() 25 assert(rd == result); in main() 31 : "=r"(rd) in main() 34 assert(rd == result); in main()
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/qemu/tests/tcg/mips/user/isa/r5900/ |
H A D | test_r5900_multu.c | 11 uint32_t rd, lo, hi; in multu() local 18 : "=r" (rd), "=r" (lo), "=r" (hi) in multu() 23 assert(rd == lo); in multu() 30 uint32_t rd, lo, hi; in multu1() local 37 : "=r" (rd), "=r" (lo), "=r" (hi) in multu1() 42 assert(rd == lo); in multu1() 49 uint64_t rd = multu(rs, rt); in multu_variants() local 52 assert(rd == rd1); in multu_variants() 54 return rd; in multu_variants()
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H A D | test_r5900_maddu.c | 13 uint32_t rd; in maddu() local 22 : "=r" (rd), "=r" (lo), "=r" (hi) in maddu() 27 assert(rd == lo); in maddu() 36 uint32_t rd; in maddu1() local 45 : "=r" (rd), "=r" (lo), "=r" (hi) in maddu1() 50 assert(rd == lo); in maddu1() 57 int64_t rd = maddu(a, rs, rt); in maddu_variants() local 60 assert(rd == rd1); in maddu_variants() 62 return rd; in maddu_variants()
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