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Searched refs:reserve (Results 1 – 25 of 25) sorted by relevance

/qemu/docs/
H A Dpcie_pci_bridge.txt32 To solve this problem we reserve additional buses on a firmware level.
34 The way of bus number to reserve delivery is special
49 uint32_t bus_res; Minimum number of buses to reserve
51 uint64_t io; IO space to reserve
52 uint32_t mem Non-prefetchable memory to reserve
56 uint32_t mem_pref_32; Prefetchable memory to reserve (32-bit MMIO)
57 uint64_t mem_pref_64; Prefetchable memory to reserve (64-bit MMIO)
75 -device pcie-root-port,bus=pcie.0,id=rp3,slot=3,bus-reserve=1 \
99 has proper 'bus-reserve' property value to provide secondary bus for the
H A Dpcie.txt246 For each such PCI-PCI Bridge the Guest Firmware is expected to reserve
/qemu/backends/
H A Dhostmem.c236 if (!backend->reserve && value) { in host_memory_backend_set_prealloc()
237 error_setg(errp, "'prealloc=on' and 'reserve=off' are incompatible"); in host_memory_backend_set_prealloc()
292 backend->reserve = true; in host_memory_backend_init()
467 return backend->reserve; in host_memory_backend_get_reserve()
479 error_setg(errp, "'prealloc=on' and 'reserve=off' are incompatible"); in host_memory_backend_set_reserve()
482 backend->reserve = value; in host_memory_backend_set_reserve()
560 object_class_property_add_bool(oc, "reserve", in host_memory_backend_class_init()
562 object_class_property_set_description(oc, "reserve", in host_memory_backend_class_init()
H A Dhostmem-ram.c32 ram_flags |= backend->reserve ? 0 : RAM_NORESERVE; in ram_backend_memory_alloc()
H A Dhostmem-shm.c87 ram_flags |= backend->reserve ? 0 : RAM_NORESERVE; in shm_backend_memory_alloc()
H A Dhostmem-memfd.c58 ram_flags |= backend->reserve ? 0 : RAM_NORESERVE; in memfd_backend_memory_alloc()
H A Dhostmem-file.c88 ram_flags |= backend->reserve ? 0 : RAM_NORESERVE; in file_backend_memory_alloc()
/qemu/tests/qapi-schema/
H A Dreserved-type-list.json2 # We reserve names ending in 'List' for use by array types.
/qemu/include/sysemu/
H A Dhostmem.h76 bool prealloc, is_mapped, share, reserve; member
/qemu/tests/vm/
H A Dcentos-8-aarch64.ks44 %addon com_redhat_kdump --enable --reserve-mb='auto'
/qemu/hw/scsi/
H A Dviosrp.h190 struct mad_reserve_cap reserve; member
H A Dspapr_vscsi.c1023 cap.reserve.type = 0; in vscsi_send_capabilities()
1025 cap.reserve.common.server_support = 0; in vscsi_send_capabilities()
/qemu/qapi/
H A Dqom.json610 # @reserve: if true, reserve swap space (or huge pages) if applicable
620 # .. note:: prealloc=true and reserve=false cannot be set at the same
621 # time. With reserve=true, the behavior depends on the operating
622 # system: for example, Linux will not reserve swap space for shared
623 # file mappings -- "not applicable". In contrast, reserve=false
637 '*reserve': 'bool',
H A Dmachine.json906 # @reserve: whether swap space (or huge pages) was reserved if
909 # reservation. For example, Linux will never reserve swap space
926 '*reserve': 'bool',
/qemu/docs/specs/
H A Dppc-spapr-uv-hcalls.rst15 to reserve a hypercall number range specific to this use case to avoid any
/qemu/hw/core/
H A Dmachine-hmp-cmds.c130 m->value->reserve ? "true" : "false"); in hmp_info_memdev()
H A Dmachine-qmp-cmds.c186 m->reserve = object_property_get_bool(obj, "reserve", &err); in query_memdev()
/qemu/linux-headers/asm-x86/
H A Dkvm.h95 __u8 reserve:7; member
/qemu/docs/devel/migration/
H A Dqpl-compression.rst184 When using ``SVM`` technology, users do not need to reserve memory for the
/qemu/pc-bios/
H A Dedk2-licenses.txt270 for the license granted to Intel hereunder, You reserve all right,
491 for the license granted to Intel hereunder, You reserve all right,
/qemu/docs/system/s390x/
H A Dvfio-ap.rst256 By default, the two masks are set to reserve all APQNs for use by the default
/qemu/docs/interop/
H A Dqcow2.txt451 Although a large enough refcount table can reserve clusters past 64 PB
/qemu/docs/system/
H A Dqemu-block-drivers.rst.inc19 Linux or NTFS on Windows), then only the written sectors will reserve
/qemu/docs/tools/
H A Dqemu-img.rst768 Linux or NTFS on Windows), then only the written sectors will reserve
/qemu/tcg/aarch64/
H A Dtcg-target.c.inc39 TCG_REG_X28, /* we will reserve this for guest_base if configured */