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Searched refs:stl_le_p (Results 1 – 25 of 29) sorted by relevance

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/qemu/hw/usb/
H A Ddev-network.c680 stl_le_p(outbuf, 0); in ndis_query()
724 stl_le_p(outbuf, 1); in ndis_query()
743 stl_le_p(outbuf, 0); in ndis_query()
754 stl_le_p(outbuf, 0); in ndis_query()
759 stl_le_p(outbuf, 0); in ndis_query()
764 stl_le_p(outbuf, 0); in ndis_query()
769 stl_le_p(outbuf, 0); in ndis_query()
774 stl_le_p(outbuf, 0); in ndis_query()
795 stl_le_p(outbuf, 1); in ndis_query()
804 stl_le_p(outbuf, 0); in ndis_query()
[all …]
/qemu/hw/cxl/
H A Dcxl-component-utils.c118 stl_le_p((uint8_t *)cache_mem + offset, value); in dumb_hdm_handler()
217 stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_STATUS, 0); in ras_init_common()
218 stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_STATUS, 0x1cfff); in ras_init_common()
220 stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff); in ras_init_common()
221 stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff); in ras_init_common()
222 stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff); in ras_init_common()
224 stl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS, 0); in ras_init_common()
225 stl_le_p(write_msk + R_CXL_RAS_COR_ERR_STATUS, 0x7f); in ras_init_common()
226 stl_le_p(reg_state + R_CXL_RAS_COR_ERR_MASK, 0x7f); in ras_init_common()
227 stl_le_p(write_msk + R_CXL_RAS_COR_ERR_MASK, 0x7f); in ras_init_common()
[all …]
H A Dcxl-mailbox-utils.c805 stl_le_p(&id->lsa_size, cvc->get_lsa_size(ct3d)); in cmd_identify_memory_device()
1097 stl_le_p(&out->records[i].length, (stop - start) / CXL_CACHE_LINE_SIZE); in cmd_media_get_poison_list()
/qemu/hw/virtio/
H A Dvirtio-crypto.c283 stl_le_p(&input.status, VIRTIO_CRYPTO_NOTSUPP); in virtio_crypto_create_session_completion()
285 stl_le_p(&input.status, VIRTIO_CRYPTO_KEY_REJECTED); in virtio_crypto_create_session_completion()
287 stl_le_p(&input.status, VIRTIO_CRYPTO_ERR); in virtio_crypto_create_session_completion()
291 stl_le_p(&input.status, VIRTIO_CRYPTO_OK); in virtio_crypto_create_session_completion()
437 stl_le_p(&input.status, VIRTIO_CRYPTO_NOTSUPP); in virtio_crypto_handle_ctrl()
1146 stl_le_p(&crypto_cfg.status, c->status); in virtio_crypto_get_config()
1147 stl_le_p(&crypto_cfg.max_dataqueues, c->max_queues); in virtio_crypto_get_config()
1151 stl_le_p(&crypto_cfg.hash_algo, c->conf.hash_algo); in virtio_crypto_get_config()
1152 stl_le_p(&crypto_cfg.mac_algo_l, c->conf.mac_algo_l); in virtio_crypto_get_config()
1153 stl_le_p(&crypto_cfg.mac_algo_h, c->conf.mac_algo_h); in virtio_crypto_get_config()
[all …]
H A Dvirtio-config-io.c198 stl_le_p(vdev->config + addr, val); in virtio_config_modern_writel()
/qemu/hw/mem/
H A Dcxl_type3.c526 stl_le_p(header_log + i, cxl_err->header[i]); in ct3d_reg_write()
546 stl_le_p((uint8_t *)cache_mem + offset, unc_err); in ct3d_reg_write()
555 stl_le_p((uint8_t *)cache_mem + offset, temp); in ct3d_reg_write()
562 stl_le_p((uint8_t *)cache_mem + offset, value); in ct3d_reg_write()
1164 stl_le_p(header_log + i, cxl_err->header[i]); in qmp_cxl_inject_uncorrectable_errors()
1169 stl_le_p(cache_mem + R_CXL_RAS_ERR_CAP_CTRL, capctrl); in qmp_cxl_inject_uncorrectable_errors()
1180 stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_STATUS, unc_err); in qmp_cxl_inject_uncorrectable_errors()
1225 stl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS, cor_err); in qmp_cxl_inject_correctable_error()
1511 stl_le_p(&module.dirty_shutdown_count, dirty_shutdown_count); in qmp_cxl_inject_memory_module_event()
1512 stl_le_p(&module.corrected_volatile_error_count, in qmp_cxl_inject_memory_module_event()
[all …]
/qemu/hw/pci-host/
H A Dsh_pci.c59 stl_le_p(pcic->dev->config + addr, val); in sh_pci_reg_write()
H A Draven.c189 stl_le_p(buf, val); in raven_io_write()
H A Dppc440_pcix.c174 stl_le_p(s->config + addr, val); in ppc440_pcix_reg_write4()
/qemu/include/exec/
H A Dcpu-all.h59 #define stl_p(p, v) stl_le_p(p, v)
/qemu/include/hw/virtio/
H A Dvirtio-access.h110 stl_le_p(ptr, v); in virtio_stl_p()
/qemu/target/i386/tcg/
H A Daccess.c154 stl_le_p(p, val); in access_stl()
/qemu/hw/nvme/
H A Dctrl.c7148 stl_le_p(&n->bar.csts, 0); in nvme_ctrl_reset()
7151 stl_le_p(&n->bar.intms, 0); in nvme_ctrl_reset()
7152 stl_le_p(&n->bar.intmc, 0); in nvme_ctrl_reset()
7153 stl_le_p(&n->bar.cc, 0); in nvme_ctrl_reset()
7273 stl_le_p(&n->bar.cmbloc, cmbloc); in nvme_cmb_enable_regs()
7282 stl_le_p(&n->bar.cmbsz, cmbsz); in nvme_cmb_enable_regs()
7319 stl_le_p(&n->bar.intms, intms); in nvme_write_bar()
7338 stl_le_p(&n->bar.cc, data); in nvme_write_bar()
7367 stl_le_p(&n->bar.csts, csts); in nvme_write_bar()
7390 stl_le_p(&n->bar.aqa, data); in nvme_write_bar()
[all …]
/qemu/hw/nvram/
H A Dnrf51_nvm.c298 stl_le_p(s->storage + offset, oldval); in flash_write()
/qemu/include/qemu/
H A Dbswap.h325 static inline void stl_le_p(void *ptr, uint32_t v) in stl_le_p() function
/qemu/tests/qtest/
H A Dhd-geo-test.c464 stl_le_p(&buf[offset + 0x8], mbr[i].start_sect); in create_qcow2_with_mbr()
465 stl_le_p(&buf[offset + 0xc], mbr[i].nr_sects); in create_qcow2_with_mbr()
/qemu/hw/display/
H A Dedid-generate.c456 stl_le_p(edid + 12, serial_nr); in qemu_edid_generate()
/qemu/hw/i386/
H A Dintel_iommu.c97 stl_le_p(&s->csr[addr], val); in vtd_define_long()
98 stl_le_p(&s->wmask[addr], wmask); in vtd_define_long()
99 stl_le_p(&s->w1cmask[addr], w1cmask); in vtd_define_long()
104 stl_le_p(&s->womask[addr], mask); in vtd_define_long_wo()
122 stl_le_p(&s->csr[addr], in vtd_set_long()
160 stl_le_p(&s->csr[addr], new_val); in vtd_set_clear_mask_long()
/qemu/hw/net/fsl_etsec/
H A Drings.c137 stl_le_p(&bd->bufptr, bd->bufptr); in write_buffer_descriptor()
/qemu/hw/net/
H A Dne2000.c459 stl_le_p(s->mem + addr, val); in ne2000_mem_writel()
H A Dallwinner-sun8i-emac.c759 stl_le_p(s->conf.macaddr.a, value); in allwinner_sun8i_emac_write()
/qemu/include/hw/pci/
H A Dpci.h432 stl_le_p(config, val); in pci_set_long()
/qemu/hw/scsi/
H A Dmptconfig.c85 stl_le_p(data + ofs, val.ll); in vfill()
/qemu/system/
H A Dmemory_ldst.c.inc326 stl_le_p(ptr, val);
/qemu/target/arm/tcg/
H A Dsme_helper.c416 DO_ST(st1s_le, uint32_t, stl_le_p, cpu_stl_le_data_ra) in DO_LD()

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