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Searched refs:swi (Results 1 – 7 of 7) sorted by relevance

/qemu/hw/intc/
H A Driscv_aclint.c407 RISCVAclintSwiState *swi = opaque; in riscv_aclint_swi_read() local
409 if (addr < (swi->num_harts << 2)) { in riscv_aclint_swi_read()
430 RISCVAclintSwiState *swi = opaque; in riscv_aclint_swi_write() local
432 if (addr < (swi->num_harts << 2)) { in riscv_aclint_swi_write()
441 qemu_irq_raise(swi->soft_irqs[hartid - swi->hartid_base]); in riscv_aclint_swi_write()
443 if (!swi->sswi) { in riscv_aclint_swi_write()
444 qemu_irq_lower(swi->soft_irqs[hartid - swi->hartid_base]); in riscv_aclint_swi_write()
477 memory_region_init_io(&swi->mmio, OBJECT(dev), &riscv_aclint_swi_ops, swi, in riscv_aclint_swi_realize()
481 swi->soft_irqs = g_new(qemu_irq, swi->num_harts); in riscv_aclint_swi_realize()
482 qdev_init_gpio_out(dev, swi->soft_irqs, swi->num_harts); in riscv_aclint_swi_realize()
[all …]
H A Domap_intc.c37 uint32_t swi; member
153 bank->irqs = (bank->inputs &= ~(1 << n)) | bank->swi; in omap_set_intr_noedge()
348 s->bank[i].swi = 0x00000000; in omap_inth_reset()
479 return bank->swi; in omap2_inth_read()
577 bank->irqs |= bank->swi |= value; in omap2_inth_write()
583 bank->swi &= ~value; in omap2_inth_write()
584 bank->irqs = bank->swi & bank->inputs; in omap2_inth_write()
/qemu/tests/tcg/arm/
H A Dtest-arm-iwmmxt.S39 swi #0x900004 label
41 swi #0x900001 label
/qemu/common-user/host/arm/
H A Dsafe-syscall.inc.S75 swi 0
/qemu/linux-user/arm/
H A Dvdso.S34 swi #0
/qemu/target/microblaze/
H A Dinsns.decode239 swi 111110 ..... ..... ................ @typeb
/qemu/disas/
H A Dmicroblaze.c111 sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, enumerator
406 …OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, swi, memory_store_inst …