| /qemu/include/tcg/ |
| H A D | tcg-op.h | 213 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
335 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
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| H A D | tcg-op-common.h | 296 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
527 tcg_gen_ext_i32_i64((NAT)r, a); in tcg_gen_ext_i32_ptr()
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| /qemu/target/tricore/ |
| H A D | translate.c | 495 tcg_gen_ext_i32_i64(t1, r1); in gen_madd32_d()
496 tcg_gen_ext_i32_i64(t2, r2); in gen_madd32_d()
497 tcg_gen_ext_i32_i64(t3, r3); in gen_madd32_d()
994 tcg_gen_ext_i32_i64(t2, arg2); in gen_madd32_q()
995 tcg_gen_ext_i32_i64(t3, arg3); in gen_madd32_q()
1000 tcg_gen_ext_i32_i64(t1, arg1); in gen_madd32_q()
1086 tcg_gen_ext_i32_i64(t2, temp); in gen_m16add64_q()
1112 tcg_gen_ext_i32_i64(t2, temp); in gen_m16adds64_q()
1205 tcg_gen_ext_i32_i64(t1, r1); in gen_msub32_d()
1206 tcg_gen_ext_i32_i64(t2, r2); in gen_msub32_d()
[all …]
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| /qemu/target/hexagon/ |
| H A D | genptr.c | 1121 tcg_gen_ext_i32_i64(mask, width); in gen_insert_rp()
1125 tcg_gen_ext_i32_i64(tmp, offset); in gen_insert_rp()
1159 tcg_gen_ext_i32_i64(shift_amt64, shift_amt32); in gen_asr_r_svw_trun()
1172 tcg_gen_ext_i32_i64(shift_amt64, shift_amt32); in gen_asr_r_svw_trun()
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| /qemu/target/rx/ |
| H A D | translate.c | 1705 tcg_gen_ext_i32_i64(tmp0, cpu_regs[rs]); in rx_mul64hi()
1707 tcg_gen_ext_i32_i64(tmp1, cpu_regs[rs2]); in rx_mul64hi()
1718 tcg_gen_ext_i32_i64(tmp0, cpu_regs[rs]); in rx_mul64lo()
1720 tcg_gen_ext_i32_i64(tmp1, cpu_regs[rs2]); in rx_mul64lo()
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| /qemu/target/s390x/tcg/ |
| H A D | translate_vx.c.inc | 1455 tcg_gen_ext_i32_i64(t0, a);
1456 tcg_gen_ext_i32_i64(t1, b);
1771 tcg_gen_ext_i32_i64(t0, a);
1772 tcg_gen_ext_i32_i64(t1, b);
1773 tcg_gen_ext_i32_i64(t2, c);
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| /qemu/tcg/ |
| H A D | tcg-op.c | 1229 tcg_gen_ext_i32_i64(t0, arg1); in tcg_gen_muls2_i32()
1230 tcg_gen_ext_i32_i64(t1, arg2); in tcg_gen_muls2_i32()
1256 tcg_gen_ext_i32_i64(t0, arg1); in tcg_gen_mulsu2_i32()
3184 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) in tcg_gen_ext_i32_i64() function
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| H A D | tcg.c | 2306 tcg_gen_ext_i32_i64(temp, orig); in tcg_gen_callN()
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| /qemu/target/arm/tcg/ |
| H A D | translate-neon.c | 1446 tcg_gen_ext_i32_i64, in trans_VSHLL_S_2sh()
2780 tcg_gen_ext_i32_i64, in trans_VPADDL_S()
2816 tcg_gen_ext_i32_i64, in trans_VPADAL_S()
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| H A D | translate.c | 6051 tcg_gen_ext_i32_i64(p64, t1); in op_smlad()
6052 tcg_gen_ext_i32_i64(q64, t2); in op_smlad()
6055 tcg_gen_ext_i32_i64(q64, t2); in op_smlad()
6113 tcg_gen_ext_i32_i64(l1, t1); in op_smlald()
6114 tcg_gen_ext_i32_i64(l2, t2); in op_smlald()
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| H A D | translate-vfp.c | 352 tcg_gen_ext_i32_i64(nf, cpu_NF); in trans_VSEL()
353 tcg_gen_ext_i32_i64(vf, cpu_VF); in trans_VSEL()
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| H A D | translate-a64.c | 440 tcg_gen_ext_i32_i64(c64->value, c32.value); in a64_test_cc()
10701 { tcg_gen_ext_i32_i64, tcg_gen_extu_i32_i64 }, in handle_3rd_wide()
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| H A D | translate-sve.c | 2529 tcg_gen_ext_i32_i64(cmp, last); in TRANS_FEAT()
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| /qemu/target/riscv/ |
| H A D | translate.c | 446 tcg_gen_ext_i32_i64(t, cpu_gpr[reg_num]); in get_fpr_hs()
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| /qemu/target/m68k/ |
| H A D | translate.c | 3443 tcg_gen_ext_i32_i64(t64, reg); in shift_reg()
5671 tcg_gen_ext_i32_i64(acc, val); in DISAS_INSN()
5674 tcg_gen_ext_i32_i64(acc, val); in DISAS_INSN()
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| /qemu/target/xtensa/ |
| H A D | translate.c | 2311 tcg_gen_ext_i32_i64(v, arg[1].in); in translate_sra()
6495 tcg_gen_ext_i32_i64(arg2, arg[2].in); in translate_movcond_d()
6610 tcg_gen_ext_i32_i64(arg[0].out, arg[1].in); in translate_wfr_s()
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| /qemu/target/alpha/ |
| H A D | translate.c | 2473 tcg_gen_ext_i32_i64(vc, t32); in translate_one()
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| /qemu/target/ppc/translate/ |
| H A D | vmx-impl.c.inc | 3283 tcg_gen_ext_i32_i64(val1, a);
3284 tcg_gen_ext_i32_i64(val2, b);
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