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Searched refs:tt (Results 1 – 25 of 32) sorted by relevance

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/qemu/tests/unit/
H A Dtest-throttle.c31 static ThrottleTimers *tt; variable
159 tt = &tgm.throttle_timers; in test_init()
163 memset(tt, 1, sizeof(*tt)); in test_init()
184 throttle_timers_destroy(tt); in test_init()
191 tt = &tgm.throttle_timers; in test_init_readonly()
195 memset(tt, 1, sizeof(*tt)); in test_init_readonly()
216 throttle_timers_destroy(tt); in test_init_readonly()
223 tt = &tgm.throttle_timers; in test_init_writeonly()
227 memset(tt, 1, sizeof(*tt)); in test_init_writeonly()
566 memset(tt, 0, sizeof(*tt)); in test_have_timer()
[all …]
/qemu/util/
H A Dthrottle.c206 if (tt->timer_cb[dir]) { in throttle_timers_attach_aio_context()
207 tt->timers[dir] = in throttle_timers_attach_aio_context()
209 tt->timer_cb[dir], tt->timer_opaque); in throttle_timers_attach_aio_context()
235 void throttle_timers_init(ThrottleTimers *tt, in throttle_timers_init() argument
243 memset(tt, 0, sizeof(ThrottleTimers)); in throttle_timers_init()
245 tt->clock_type = clock_type; in throttle_timers_init()
246 tt->timer_cb[THROTTLE_READ] = read_timer_cb; in throttle_timers_init()
248 tt->timer_opaque = timer_opaque; in throttle_timers_init()
276 throttle_timers_detach_aio_context(tt); in throttle_timers_destroy()
285 if (tt->timers[dir]) { in throttle_timers_are_initialized()
[all …]
/qemu/include/qemu/
H A Dthrottle.h125 void throttle_timers_init(ThrottleTimers *tt,
132 void throttle_timers_destroy(ThrottleTimers *tt);
134 void throttle_timers_detach_aio_context(ThrottleTimers *tt);
136 void throttle_timers_attach_aio_context(ThrottleTimers *tt,
139 bool throttle_timers_are_initialized(ThrottleTimers *tt);
156 ThrottleTimers *tt,
/qemu/hw/arm/
H A Dsmmu-common.c270 if (cfg->tt[0].tsz && in select_tt()
271 !extract64(iova, 64 - cfg->tt[0].tsz, cfg->tt[0].tsz - tbi_byte)) { in select_tt()
273 return &cfg->tt[0]; in select_tt()
274 } else if (cfg->tt[1].tsz && in select_tt()
275 sextract64(iova, 64 - cfg->tt[1].tsz, cfg->tt[1].tsz - tbi_byte) == -1) { in select_tt()
277 return &cfg->tt[1]; in select_tt()
280 return &cfg->tt[0]; in select_tt()
283 return &cfg->tt[1]; in select_tt()
311 if (!tt || tt->disabled) { in smmu_ptw_64_s1()
316 granule_sz = tt->granule_sz; in smmu_ptw_64_s1()
[all …]
H A Dsmmuv3.c694 SMMUTransTableInfo *tt = &cfg->tt[i]; in decode_cd() local
697 if (cfg->tt[i].disabled) { in decode_cd()
708 if ((tt->granule_sz != 12 && tt->granule_sz != 14 && in decode_cd()
713 tt->tsz = tsz; in decode_cd()
714 tt->ttb = CD_TTB(cd, i); in decode_cd()
718 tt->had = CD_HAD(cd, i); in decode_cd()
719 trace_smmuv3_decode_cd_tt(i, tt->tsz, tt->ttb, tt->granule_sz, tt->had); in decode_cd()
843 SMMUTransTableInfo *tt; in smmuv3_translate() local
888 if (!tt) { in smmuv3_translate()
1050 SMMUTransTableInfo *tt; in smmuv3_notify_iova() local
[all …]
/qemu/fsdev/
H A Dqemu-fsdev-throttle.c85 throttle_timers_init(&fst->tt, in fsdev_throttle_init()
103 if (throttle_schedule_timer(&fst->ts, &fst->tt, direction) || in fsdev_co_throttle_request()
111 !throttle_schedule_timer(&fst->ts, &fst->tt, direction)) { in fsdev_co_throttle_request()
120 throttle_timers_destroy(&fst->tt); in fsdev_throttle_cleanup()
H A Dqemu-fsdev-throttle.h24 ThrottleTimers tt; member
/qemu/target/sparc/
H A Dhelper.c27 void cpu_raise_exception_ra(CPUSPARCState *env, int tt, uintptr_t ra) in cpu_raise_exception_ra() argument
31 cs->exception_index = tt; in cpu_raise_exception_ra()
35 void helper_raise_exception(CPUSPARCState *env, int tt) in helper_raise_exception() argument
39 cs->exception_index = tt; in helper_raise_exception()
H A Dint64_helper.c109 if (unlikely(env->tl > 0 && cpu_tsptr(env)->tt > new_interrupt in cpu_check_irqs()
110 && ((cpu_tsptr(env)->tt & 0x1f0) == TT_EXTINT))) { in cpu_check_irqs()
112 cpu_tsptr(env)->tt, in cpu_check_irqs()
197 tsptr->tt = intno; in sparc_cpu_do_interrupt()
H A Dwin_helper.c202 int tt = TT_SPILL | (env->otherwin != 0 in helper_save() local
205 cpu_raise_exception_ra(env, tt, GETPC()); in helper_save()
224 int tt = TT_FILL | (env->otherwin != 0 in helper_restore() local
227 cpu_raise_exception_ra(env, tt, GETPC()); in helper_restore()
238 int tt = TT_SPILL | (env->otherwin != 0 in helper_flushw() local
241 cpu_raise_exception_ra(env, tt, GETPC()); in helper_flushw()
H A Dtrace-events22 sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d c…
H A Dmachine.c36 VMSTATE_UINT32(tt, trap_state),
H A Dldst_helper.c466 int tt = is_exec ? TT_CODE_ACCESS : TT_DATA_ACCESS; in sparc_raise_mmu_fault() local
467 cpu_raise_exception_ra(env, tt, retaddr); in sparc_raise_mmu_fault()
/qemu/block/
H A Dthrottle-groups.c272 ThrottleTimers *tt = &tgm->throttle_timers; in throttle_group_schedule_timer() local
284 must_wait = throttle_schedule_timer(ts, tt, direction); in throttle_group_schedule_timer()
344 ThrottleTimers *tt = &token->throttle_timers; in schedule_next_request() local
346 timer_mod(tt->timers[direction], now); in schedule_next_request()
627 ThrottleTimers *tt = &tgm->throttle_timers; in throttle_group_attach_aio_context() local
628 throttle_timers_attach_aio_context(tt, new_context); in throttle_group_attach_aio_context()
635 ThrottleTimers *tt = &tgm->throttle_timers; in throttle_group_detach_aio_context() local
647 if (timer_pending(tt->timers[dir])) { in throttle_group_detach_aio_context()
654 throttle_timers_detach_aio_context(tt); in throttle_group_detach_aio_context()
/qemu/crypto/
H A Dxts.c57 uint64_t tt; in xts_mult_x() local
61 tt = I->u[0] >> 63; in xts_mult_x()
68 I->u[1] |= tt; in xts_mult_x()
/qemu/docs/sphinx-static/
H A Dtheme_overrides.css150 code, .rst-content tt, .rst-content code {
158 .rst-content tt.literal,.rst-content tt.literal,.rst-content code.literal {
/qemu/include/hw/arm/
H A Dsmmu-common.h105 SMMUTransTableInfo tt[2]; member
191 SMMUTransTableInfo *tt, hwaddr iova);
/qemu/target/m68k/
H A Dop_helper.c520 raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr) in raise_exception_ra() argument
524 cs->exception_index = tt; in raise_exception_ra()
528 G_NORETURN static void raise_exception(CPUM68KState *env, int tt) in raise_exception() argument
530 raise_exception_ra(env, tt, 0); in raise_exception()
533 void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt) in HELPER()
535 raise_exception(env, tt); in HELPER()
539 raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t raddr) in raise_exception_format2() argument
543 cs->exception_index = tt; in raise_exception_format2()
H A Dhelper.c160 static void raise_exception_ra(CPUM68KState *env, int tt, uintptr_t raddr) in raise_exception_ra() argument
164 cs->exception_index = tt; in raise_exception_ra()
/qemu/backends/
H A Dcryptodev.c258 throttle_schedule_timer(&backend->ts, &backend->tt, in cryptodev_backend_throttle_timer_cb()
275 if (throttle_schedule_timer(&backend->ts, &backend->tt, THROTTLE_WRITE) || in cryptodev_backend_crypto_operation()
332 throttle_timers_destroy(&backend->tt); in cryptodev_backend_set_throttle()
344 throttle_timers_init(&backend->tt, qemu_get_aio_context(), in cryptodev_backend_set_throttle()
478 throttle_timers_destroy(&backend->tt); in cryptodev_backend_finalize()
/qemu/scripts/
H A Ddecodetree.py1068 tt = t[1:]
1071 if tt in arguments:
1072 arg = arguments[tt]
1079 tt = t[1:]
1082 if tt in formats:
1083 fmt = formats[tt]
1090 tt = t[1:]
1091 flds = add_field_byname(lineno, flds, tt, tt)
/qemu/tcg/
H A Dtcg-op-vec.c511 TCGTemp *tt = NULL; in tcg_gen_cmp_vec() local
525 tt = tcg_temp_new_internal(type, TEMP_EBB); in tcg_gen_cmp_vec()
526 ti = temp_arg(tt); in tcg_gen_cmp_vec()
528 at = tt; in tcg_gen_cmp_vec()
544 if (tt) { in tcg_gen_cmp_vec()
545 tcg_temp_free_internal(tt); in tcg_gen_cmp_vec()
/qemu/target/hexagon/imported/
H A Dencode_pp.def761 DEF_ENC32(C2_and, ICLASS_CR" 1011 0000--ss PP0---tt ------dd")
762 DEF_ENC32(C2_or, ICLASS_CR" 1011 0010--ss PP0---tt ------dd")
763 DEF_ENC32(C2_xor, ICLASS_CR" 1011 0100--ss PP0---tt ------dd")
764 DEF_ENC32(C2_andn, ICLASS_CR" 1011 0110--ss PP0---tt ------dd")
768 DEF_ENC32(C2_orn, ICLASS_CR" 1011 1110--ss PP0---tt ------dd")
770 DEF_ENC32(C4_and_and, ICLASS_CR" 1011 0001--ss PP0---tt uu----dd")
771 DEF_ENC32(C4_and_or, ICLASS_CR" 1011 0011--ss PP0---tt uu----dd")
772 DEF_ENC32(C4_or_and, ICLASS_CR" 1011 0101--ss PP0---tt uu----dd")
773 DEF_ENC32(C4_or_or, ICLASS_CR" 1011 0111--ss PP0---tt uu----dd")
774 DEF_ENC32(C4_and_andn, ICLASS_CR" 1011 1001--ss PP0---tt uu----dd")
[all …]
/qemu/target/hexagon/idef-parser/
H A Didef-parser.lex51 REG_ID_64 ee|ss|dd|tt|uu|vv|xx|yy
/qemu/include/sysemu/
H A Dcryptodev.h280 ThrottleTimers tt; member

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