Searched refs:uncached_cpsr (Results 1 – 9 of 9) sorted by relevance
295 env->uncached_cpsr ^= CPSR_E; in HELPER()569 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) { in HELPER()584 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) { in HELPER()593 if ((env->uncached_cpsr & CPSR_M) == mode) { in HELPER()602 if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_SYS) { in HELPER()610 if ((env->uncached_cpsr & CPSR_M) == mode) { in HELPER()625 int curmode = env->uncached_cpsr & CPSR_M; in msr_mrs_banked_exc_checks()689 if (tgtmode == (env->uncached_cpsr & CPSR_M)) { in HELPER()728 if (tgtmode == (env->uncached_cpsr & CPSR_M)) { in HELPER()
183 if (env->uncached_cpsr & CPSR_IL) { in rebuild_hflags_a32()
531 env->uncached_cpsr |= CPSR_E; in target_cpu_copy_regs()
705 env->uncached_cpsr &= ~CPSR_E; in do_cpu_reset()712 env->uncached_cpsr |= CPSR_E; in do_cpu_reset()
297 s->cpu->env.uncached_cpsr = ARM_CPU_MODE_SVC; in pxa2xx_pwrmode_write()
275 return env->uncached_cpsr & CPSR_PAN; in arm_pan_enabled()10635 env->uncached_cpsr = (env->uncached_cpsr & ~mask) | (val & mask); in cpsr_write()10670 old_mode = env->uncached_cpsr & CPSR_M; in switch_mode()10864 uint32_t mode = env->uncached_cpsr & CPSR_M; in aarch64_sync_32_to_64()11089 env->uncached_cpsr = (env->uncached_cpsr & ~CPSR_M) | new_mode; in take_aarch32_exception()11095 env->uncached_cpsr &= ~CPSR_E; in take_aarch32_exception()11097 env->uncached_cpsr |= CPSR_E; in take_aarch32_exception()11100 env->uncached_cpsr &= ~(CPSR_IL | CPSR_J); in take_aarch32_exception()11105 env->uncached_cpsr |= CPSR_SSBS; in take_aarch32_exception()11107 env->uncached_cpsr &= ~CPSR_SSBS; in take_aarch32_exception()[all …]
239 uint32_t uncached_cpsr; member2458 (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) { in arm_is_el3_or_mon()2656 switch (env->uncached_cpsr & 0x1f) { in arm_current_el()2982 return env->uncached_cpsr & CPSR_E; in arm_cpu_data_is_big_endian_a32()
345 env->uncached_cpsr = ARM_CPU_MODE_USR; in arm_cpu_reset_hold()362 env->uncached_cpsr = ARM_CPU_MODE_HYP; in arm_cpu_reset_hold()364 env->uncached_cpsr = ARM_CPU_MODE_SVC; in arm_cpu_reset_hold()
2119 i = bank_number(env->uncached_cpsr & CPSR_M); in kvm_arch_put_registers()2312 i = bank_number(env->uncached_cpsr & CPSR_M); in kvm_arch_get_registers()