/qemu/tests/qemu-iotests/ |
H A D | 260.out | 17 check updated bitmap: name=bitmap0 dirty-clusters=3 34 check updated bitmap: name=bitmap0 dirty-clusters=3 52 check updated bitmap: name=bitmap0 dirty-clusters=3
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/qemu/hw/xen/ |
H A D | xen_pt_msi.c | 335 if (!entry->updated) { in xen_pt_msix_update_one() 368 entry->updated = false; in xen_pt_msix_update_one() 399 entry->updated = false; in xen_pt_msix_disable() 421 entry->updated = true; in xen_pt_msix_update_remap() 460 entry->updated = true; in pci_msix_write() 461 } else if (msix->enabled && entry->updated && in pci_msix_write()
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H A D | xen_pt.h | 217 bool updated; /* indicate whether MSI ADDR or DATA is updated */ member
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/qemu/docs/devel/ |
H A D | multi-thread-tcg.rst | 68 updated with atomic accesses to ensure consistent results. The fall 132 There are a number of look-up caches that need to be properly updated 149 - ensure lookup caches/hashes are safely updated 153 The direct jump themselves are updated atomically by the TCG 163 The lookup caches are updated atomically and the lookup hash uses QHT 186 When the TLB tables are updated by a vCPU thread other than their own 204 - updated by its own thread when the slow-path is forced 305 following front-ends have been updated to emit fences when required:
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H A D | clocks.rst | 64 is updated, the value is immediately propagated to all connected 220 is updated, ``clk2`` will be updated too. 257 In the above example, when *Clock 1* is updated by *Device A*, three 294 clock will be considered as disabled until the period is updated. If
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H A D | tcg.rst | 81 data. The information updated in this step must be inferable from both 96 to step 2. Then the CPU state information gets updated and we exit from
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H A D | tcg-plugins.rst | 22 your plugin upstream so they can be updated if/when the API changes.
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/qemu/docs/system/arm/ |
H A D | sbsa.rst | 75 The ``machine-version-major`` value is updated when changes breaking 77 is updated when features are added that don't break fw compatibility.
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/qemu/scripts/ci/setup/ubuntu/ |
H A D | build-environment.yml | 35 # the package lists are updated by "make lcitool-refresh"
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/qemu/hw/misc/ |
H A D | aspeed_scu.c | 990 bool updated = false; in aspeed_ast2700_scuio_write() local 1005 updated = true; in aspeed_ast2700_scuio_write() 1010 updated = true; in aspeed_ast2700_scuio_write() 1019 if (!updated) { in aspeed_ast2700_scuio_write()
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/qemu/docs/specs/ |
H A D | standard-vga.rst | 80 port first), so indexed registers can be updated with a single
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H A D | ppc-xive.rst | 162 Interrupt Priority Register (PIPR) is also updated using the IPB. This 169 Register (NSR) is updated to notify the presence of an exception for
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H A D | acpi_erst.rst | 91 simply returns the register contents, which can be updated by a
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H A D | rapl-msr.rst | 79 10. The virtual MSRs are updated for each virtual package. Each vCPU that
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/qemu/linux-headers/linux/ |
H A D | userfaultfd.h | 356 __s64 updated; member
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/qemu/docs/interop/ |
H A D | virtio-balloon-stats.rst | 45 has not updated the stats (yet).
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H A D | vhost-user-gpu.rst | 265 The display should be flushed and presented according to updated
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/qemu/scripts/coverity-scan/ |
H A D | coverity-scan.docker | 13 # is updated.
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/qemu/ui/ |
H A D | vnc.h | 115 bool updated; /* Already updated during this refresh */ member
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/qemu/docs/ |
H A D | multiseat.txt | 87 fully updated for the new kernel though, i.e. the live iso doesn't cut
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/qemu/docs/system/ppc/ |
H A D | powernv.rst | 54 QEMU includes a prebuilt image of ``skiboot`` which is updated when a
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H A D | pseries.rst | 45 QEMU includes a prebuilt image of SLOF which is updated when a more recent
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/qemu/docs/system/devices/ |
H A D | can.rst | 183 …en in Real-time Control Applications Slides from LinuxDays 2017 (include updated RTLWS 2015 conten…
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/qemu/docs/about/ |
H A D | deprecated.rst | 399 These image files should be updated to use the current format. 456 prevented CPU models from being updated to include CPU
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/qemu/docs/system/i386/ |
H A D | amd-memory-encryption.rst | 111 guest register state is encrypted and cannot be updated by the VMM/hypervisor,
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