| /qemu/tests/unit/ |
| H A D | test-visitor-serialization.c | 57 } value; member
76 } value; member
334 g_assert_cmpint(pt->value.s8, ==, pt_copy->value.s8); in test_primitives()
490 g_assert_cmpint(pt->value.s8, ==, ptr->value); in test_primitive_lists()
496 g_assert_cmpint(pt->value.s16, ==, ptr->value); in test_primitive_lists()
502 g_assert_cmpint(pt->value.s32, ==, ptr->value); in test_primitive_lists()
508 g_assert_cmpint(pt->value.s64, ==, ptr->value); in test_primitive_lists()
514 g_assert_cmpint(pt->value.u8, ==, ptr->value); in test_primitive_lists()
520 g_assert_cmpint(pt->value.u16, ==, ptr->value); in test_primitive_lists()
526 g_assert_cmpint(pt->value.u32, ==, ptr->value); in test_primitive_lists()
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| /qemu/include/qemu/ |
| H A D | stats64.h | 24 aligned_uint64_t value; member
45 qatomic_set__nocheck(&s->value, value); in stat64_set()
50 qatomic_add(&s->value, value); in stat64_add()
56 while (orig > value) { in stat64_min()
57 orig = qatomic_cmpxchg__nocheck(&s->value, orig, value); in stat64_min()
64 while (orig < value) { in stat64_max()
65 orig = qatomic_cmpxchg__nocheck(&s->value, orig, value); in stat64_max()
78 *s = (Stat64) { .low = value, .high = value >> 32, .lock = 0 }; in stat64_init()
84 high = value >> 32; in stat64_add()
122 high = value >> 32; in stat64_min()
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| /qemu/ |
| H A D | meson_options.txt | 5 option('qemu_suffix', type : 'string', value: 'qemu',
11 option('pkgversion', type : 'string', value : '',
13 option('smbd', type : 'string', value : '',
15 option('iasl', type : 'string', value : '',
70 option('kvm', type: 'feature', value: 'auto',
72 option('whpx', type: 'feature', value: 'auto',
74 option('hvf', type: 'feature', value: 'auto',
78 option('xen', type: 'feature', value: 'auto',
96 option('tsan', type: 'boolean', value: false,
100 option('cfi', type: 'boolean', value: false,
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| /qemu/hw/net/fsl_etsec/ |
| H A D | miim.c | 43 uint16_t value; in miim_read_cycle() local
54 value = etsec->phy_status; in miim_read_cycle()
60 value = 0x0; in miim_read_cycle()
68 etsec->regs[MIIMSTAT].value = value; in miim_read_cycle()
75 uint16_t value; in miim_write_cycle() local
80 value = etsec->regs[MIIMCON].value & 0xffff; in miim_write_cycle()
106 if ((!(reg->value & MIIMCOM_READ)) && (value & MIIMCOM_READ)) { in etsec_write_miim()
110 reg->value = value; in etsec_write_miim()
114 reg->value = value & 0xffff; in etsec_write_miim()
124 reg->value = value; in etsec_write_miim()
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| H A D | etsec.c | 125 reg->value &= ~value; in write_tstat()
143 reg->value &= ~value; in write_rstat()
151 reg->value = value & ~0x7; in write_tbasex()
154 etsec->regs[TBPTR0 + (reg_index - TBASE0)].value = value & ~0x7; in write_tbasex()
162 reg->value = value & ~0x7; in write_rbasex()
173 reg->value = value; in write_dmactrl()
225 reg->value &= ~value; in etsec_write()
231 reg->value = value; in etsec_write()
266 reg->value = value; in etsec_write()
270 reg->value &= ~value; in etsec_write()
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| /qemu/tests/qtest/ |
| H A D | lsm303dlhc-mag-test.c | 53 int64_t value; in send_and_receive() local
63 g_assert_cmpint(value, ==, 100000); in send_and_receive()
69 g_assert_cmpint(value, ==, 150000); in send_and_receive()
75 g_assert_cmpint(value, ==, 50000); in send_and_receive()
83 g_assert_cmpint(value, ==, 23500); in send_and_receive()
87 g_assert_cmphex(value, ==, 1100); in send_and_receive()
91 g_assert_cmphex(value, ==, 1650); in send_and_receive()
95 g_assert_cmphex(value, ==, 490); in send_and_receive()
99 g_assert_cmphex(value, ==, 0); in send_and_receive()
106 g_assert_cmphex(value, ==, 188); in send_and_receive()
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| H A D | tmp105-test.c | 47 uint16_t value; in send_and_receive() local
51 g_assert_cmpuint(value, ==, 0); in send_and_receive()
54 g_assert_cmphex(value, ==, 0); in send_and_receive()
58 g_assert_cmpuint(value, ==, 20000); in send_and_receive()
61 g_assert_cmphex(value, ==, 0x1400); in send_and_receive()
71 g_assert_cmphex(value, ==, 0x60); in send_and_receive()
74 g_assert_cmphex(value, ==, 0x14f0); in send_and_receive()
80 g_assert_cmphex(value, ==, 0x1480); in send_and_receive()
85 g_assert_cmphex(value, ==, 0x14c0); in send_and_receive()
90 g_assert_cmphex(value, ==, 0x14e0); in send_and_receive()
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| H A D | emc141x-test.c | 43 uint16_t value; in send_and_receive() local
47 g_assert_cmpuint(value, ==, 0); in send_and_receive()
49 value = i2c_get8(i2cdev, EMC141X_TEMP_HIGH0); in send_and_receive()
50 g_assert_cmphex(value, ==, 0); in send_and_receive()
53 value = i2c_get8(i2cdev, EMC141X_TEMP_MAX_HIGH0); in send_and_receive()
54 g_assert_cmphex(value, ==, 0x55); in send_and_receive()
56 value = i2c_get8(i2cdev, EMC141X_TEMP_MIN_HIGH0); in send_and_receive()
57 g_assert_cmphex(value, ==, 0); in send_and_receive()
62 g_assert_cmpuint(value, ==, 30000); in send_and_receive()
64 value = i2c_get8(i2cdev, EMC141X_TEMP_HIGH0); in send_and_receive()
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| /qemu/hw/misc/ |
| H A D | bcm2835_property.c | 44 value &= ~0xf; in bcm2835_property_mbox_push()
46 s->addr = value; in bcm2835_property_mbox_push()
48 tot_len = ldl_le_phys(&s->dma_as, value); in bcm2835_property_mbox_push()
51 value = s->addr + 8; in bcm2835_property_mbox_push()
52 while (value + 8 <= s->addr + tot_len) { in bcm2835_property_mbox_push()
53 tag = ldl_le_phys(&s->dma_as, value); in bcm2835_property_mbox_push()
87 stl_le_phys(&s->dma_as, value + 12, 0); in bcm2835_property_mbox_push()
175 stl_le_phys(&s->dma_as, value + 16, in bcm2835_property_mbox_push()
248 stl_le_phys(&s->dma_as, value + 12, in bcm2835_property_mbox_push()
337 value += bufsize + 12; in bcm2835_property_mbox_push()
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| /qemu/hw/i2c/ |
| H A D | npcm7xx_smbus.c | 490 return value; in npcm7xx_smbus_read_sda()
495 s->sda = value; in npcm7xx_smbus_write_sda()
571 s->ctl2 = value; in npcm7xx_smbus_write_ctl2()
615 s->txf_ctl = value; in npcm7xx_smbus_write_txf_ctl()
659 uint64_t value = 0; in npcm7xx_smbus_read() local
669 value = s->st; in npcm7xx_smbus_read()
673 value = s->cst; in npcm7xx_smbus_read()
677 value = s->ctl1; in npcm7xx_smbus_read()
685 value = s->ctl2; in npcm7xx_smbus_read()
693 value = s->ctl3; in npcm7xx_smbus_read()
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| /qemu/hw/rtc/ |
| H A D | trace-events | 4 allwinner_rtc_read(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64
5 allwinner_rtc_write(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64
8 sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64
9 sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64
16 pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
17 pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
22 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
23 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
28 m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
29 m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"
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| H A D | exynos4210_rtc.c | 118 #define TICCKSEL(value) ((value & (0x0F << 4)) >> 4) argument
313 uint32_t value = 0; in exynos4210_rtc_read() local
318 value = s->reg_intp; in exynos4210_rtc_read()
321 value = s->reg_rtccon; in exynos4210_rtc_read()
324 value = s->reg_ticcnt; in exynos4210_rtc_read()
327 value = s->reg_rtcalm; in exynos4210_rtc_read()
330 value = s->reg_almsec; in exynos4210_rtc_read()
333 value = s->reg_almmin; in exynos4210_rtc_read()
339 value = s->reg_almday; in exynos4210_rtc_read()
342 value = s->reg_almmon; in exynos4210_rtc_read()
[all …]
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| /qemu/hw/display/ |
| H A D | blizzard.c | 503 if ((value & 3) == 0 || (value & 3) == 3) in blizzard_reg_write()
548 s->x = value << 3; in blizzard_reg_write()
602 s->vbi = value; in blizzard_reg_write()
605 s->tv_x = value; in blizzard_reg_write()
611 s->tv_test = value; in blizzard_reg_write()
631 s->u = value & 0xff; in blizzard_reg_write()
634 s->v = value & 0xff; in blizzard_reg_write()
748 s->border_r = value; in blizzard_reg_write()
751 s->border_g = value; in blizzard_reg_write()
802 s->gpio = value; in blizzard_reg_write()
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| H A D | omap_dss.c | 236 s->autoidle = value & 1; in omap_diss_write()
240 s->control = value & 0x3dd; in omap_diss_write()
397 s->dispc.irqst &= ~value; in omap_disc_write()
484 s->dispc.line = value & 0x7ff; in omap_disc_write()
530 if (value & (3 << 9)) in omap_disc_write()
541 s->dispc.l[0].rowinc = value; in omap_disc_write()
545 s->dispc.l[0].colinc = value; in omap_disc_write()
549 s->dispc.l[0].wininc = value; in omap_disc_write()
756 s->rfbi.control = value & 0xf; in omap_rfbi_write()
757 s->rfbi.enable = value & 1; in omap_rfbi_write()
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| /qemu/hw/dma/ |
| H A D | omap_dma.c | 371 uint8_t value[4]; in omap_dma_transfer_generic() local
780 *value = ch->status;
810 *value = ch->frames;
909 if (value & 0x0080)
952 ch->frames = value;
977 ch->color |= value;
1369 s->gcr = value;
1373 if (value & 0x8)
1380 if (value & 0x1)
1962 ch->sync = (value & 0x001f) | ((value >> 14) & 0x0060);
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| /qemu/stats/ |
| H A D | stats-hmp-cmds.c | 20 monitor_printf(mon, " %s (%s%s", value->name, StatsType_str(value->type), in print_stats_schema_value()
21 value->has_unit || value->exponent ? ", " : ""); in print_stats_schema_value()
23 if (value->has_unit) { in print_stats_schema_value()
31 if (unit && value->base == 10 && in print_stats_schema_value()
32 value->exponent >= -18 && value->exponent <= 18 && in print_stats_schema_value()
33 value->exponent % 3 == 0) { in print_stats_schema_value()
36 value->exponent >= 0 && value->exponent <= 60 && in print_stats_schema_value()
40 } else if (value->exponent) { in print_stats_schema_value()
43 value->base, value->exponent, in print_stats_schema_value()
48 if (value->has_unit) { in print_stats_schema_value()
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| /qemu/tests/qtest/fuzz/ |
| H A D | qtest_wrappers.c | 82 cpu_outb(addr, value); in __wrap_qtest_outb()
91 cpu_outw(addr, value); in __wrap_qtest_outw()
100 cpu_outl(addr, value); in __wrap_qtest_outl()
108 uint8_t value; in __wrap_qtest_readb() local
112 return value; in __wrap_qtest_readb()
120 uint16_t value; in __wrap_qtest_readw() local
124 return value; in __wrap_qtest_readw()
132 uint32_t value; in __wrap_qtest_readl() local
136 return value; in __wrap_qtest_readl()
144 uint64_t value; in __wrap_qtest_readq() local
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| /qemu/hw/arm/ |
| H A D | omap1.c | 64 uint8_t val8 = value; in omap_badwidth_write8()
82 uint16_t val16 = value; in omap_badwidth_write16()
243 s->st = value & 1; in omap_mpu_timer_write()
482 if (s->timer.st != (value & 1) || (value & 2)) { in omap_os_timer_write()
630 if (value & 1) in omap_ulpd_pm_write()
1711 if (value & 9) { in omap_clkm_write()
2034 s->dir = value; in omap_mpuio_write()
2045 s->cols = value; in omap_mpuio_write()
2054 s->edge = value; in omap_mpuio_write()
2063 s->mask = value; in omap_mpuio_write()
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| H A D | omap2.c | 724 s->irqst &= ~value; in omap_sti_write()
769 uint8_t byte = value; in omap_sti_fifo_write()
782 if (value == 0xc0 || value == 0xc3) { in omap_sti_fifo_write()
1479 s->rst[0] &= ~value; in omap_prcm_write()
1591 s->rst[1] &= ~value; in omap_prcm_write()
1618 if (value & 2) in omap_prcm_write()
1625 s->rst[2] &= ~value; in omap_prcm_write()
1666 if (value & ~3) in omap_prcm_write()
1857 int value; in omap_sysctl_read8() local
1865 value = (value >> (byte_offset * 8)) & 0xff; in omap_sysctl_read8()
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| /qemu/system/ |
| H A D | rtc.c | 57 value += rtc_ref_start_datetime; in qemu_ref_timedate()
67 return value; in qemu_ref_timedate()
142 const char *value; in configure_rtc() local
149 value = qemu_opt_get(opts, "base"); in configure_rtc()
150 if (value) { in configure_rtc()
151 if (!strcmp(value, "utc")) { in configure_rtc()
161 value = qemu_opt_get(opts, "clock"); in configure_rtc()
162 if (value) { in configure_rtc()
163 if (!strcmp(value, "host")) { in configure_rtc()
175 if (value) { in configure_rtc()
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| /qemu/hw/pci-host/ |
| H A D | ppc4xx_pci.c | 110 pci->pmm[0].la = value; in ppc4xx_pci_reg_write4()
113 pci->pmm[0].ma = value; in ppc4xx_pci_reg_write4()
123 pci->pmm[1].la = value; in ppc4xx_pci_reg_write4()
126 pci->pmm[1].ma = value; in ppc4xx_pci_reg_write4()
136 pci->pmm[2].la = value; in ppc4xx_pci_reg_write4()
139 pci->pmm[2].ma = value; in ppc4xx_pci_reg_write4()
149 pci->ptm[0].ms = value; in ppc4xx_pci_reg_write4()
152 pci->ptm[0].la = value; in ppc4xx_pci_reg_write4()
173 uint32_t value; in ppc4xx_pci_reg_read4() local
232 value = 0; in ppc4xx_pci_reg_read4()
[all …]
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| /qemu/hw/intc/ |
| H A D | arm_gicv3_cpuif.c | 132 value = MAX(value, min); in write_vbpr()
430 return value; in eoi_maintenance_interrupt_state()
467 return value; in maintenance_interrupt_state()
567 return value; in icv_ap_read()
642 return value; in icv_pmr_read()
671 return value; in icv_igrpen_read()
709 return value; in icv_ctlr_read()
762 return value; in icv_hppir_read()
1122 value = (value << 1) & 0xff; in icc_pmr_read()
1151 value = (value >> 1) | 0x80; in icc_pmr_write()
[all …]
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| /qemu/pc-bios/optionrom/ |
| H A D | optrom.h | 38 static inline void outb(uint8_t value, uint16_t port) in outb() argument
40 asm volatile("outb %0, %w1" : : "a"(value), "Nd"(port)); in outb()
43 static inline void outw(uint16_t value, uint16_t port) in outw() argument
48 static inline void outl(uint32_t value, uint16_t port) in outl() argument
55 uint8_t value; in inb() local
57 asm volatile("inb %w1, %0" : "=a"(value) : "Nd"(port)); in inb()
58 return value; in inb()
63 uint16_t value; in inw() local
66 return value; in inw()
71 uint32_t value; in inl() local
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| /qemu/ui/ |
| H A D | input-keymap.c | 33 int qemu_input_key_value_to_number(const KeyValue *value) in qemu_input_key_value_to_number() argument
35 if (value->type == KEY_VALUE_KIND_QCODE) { in qemu_input_key_value_to_number()
41 assert(value->type == KEY_VALUE_KIND_NUMBER); in qemu_input_key_value_to_number()
42 return value->u.number.data; in qemu_input_key_value_to_number()
54 int qemu_input_key_value_to_qcode(const KeyValue *value) in qemu_input_key_value_to_qcode() argument
56 if (value->type == KEY_VALUE_KIND_QCODE) { in qemu_input_key_value_to_qcode()
57 return value->u.qcode.data; in qemu_input_key_value_to_qcode()
59 assert(value->type == KEY_VALUE_KIND_NUMBER); in qemu_input_key_value_to_qcode()
67 int keycode = qemu_input_key_value_to_number(value); in qemu_input_key_value_to_scancode()
70 if (value->type == KEY_VALUE_KIND_QCODE && in qemu_input_key_value_to_scancode()
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| /qemu/hw/watchdog/ |
| H A D | wdt_imx2.c | 75 uint16_t value = 0; in imx2_wdt_read() local
79 value = s->wcr; in imx2_wdt_read()
82 value = s->wsr; in imx2_wdt_read()
85 value = s->wrsr; in imx2_wdt_read()
88 value = s->wicr; in imx2_wdt_read()
91 value = s->wmcr; in imx2_wdt_read()
95 trace_imx2_wdt_read(addr, value); in imx2_wdt_read()
97 return value; in imx2_wdt_read()
176 s->wcr = value; in imx2_wdt_write()
181 (!(value & IMX2_WDT_WCR_WT) && (value & IMX2_WDT_WCR_WDE))) { in imx2_wdt_write()
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