1 /*++ NDK Version: 0098
2
3 Copyright (c) Alex Ionescu. All rights reserved.
4
5 Header Name:
6
7 ketypes.h (ARM)
8
9 Abstract:
10
11 ARM Type definitions for the Kernel services.
12
13 Author:
14
15 Alex Ionescu (alexi@tinykrnl.org) - Updated - 27-Feb-2006
16 Timo Kreuzer (timo.kreuzer@reactos.org) - Updated 19-Apr-2015
17
18 --*/
19
20 #ifndef _ARM_KETYPES_H
21 #define _ARM_KETYPES_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 //
28 // Dependencies
29 //
30
31
32 //
33 // CPU Vendors
34 //
35 typedef enum
36 {
37 CPU_UNKNOWN = 0,
38 } CPU_VENDORS;
39
40 //
41 // Co-Processor register definitions
42 //
43 #define CP15_MIDR 15, 0, 0, 0, 0
44 #define CP15_CTR 15, 0, 0, 0, 1
45 #define CP15_TCMTR 15, 0, 0, 0, 2
46 #define CP15_TLBTR 15, 0, 0, 0, 3
47 #define CP15_MPIDR 15, 0, 0, 0, 5
48 #define CP15_PFR0 15, 0, 0, 1, 0
49 #define CP15_PFR1 15, 0, 0, 1, 1
50 #define CP15_DFR0 15, 0, 0, 1, 2
51 #define CP15_AFR0 15, 0, 0, 1, 3
52 #define CP15_MMFR0 15, 0, 0, 1, 4
53 #define CP15_MMFR1 15, 0, 0, 1, 5
54 #define CP15_MMFR2 15, 0, 0, 1, 6
55 #define CP15_MMFR3 15, 0, 0, 1, 7
56 #define CP15_ISAR0 15, 0, 0, 2, 0
57 #define CP15_ISAR1 15, 0, 0, 2, 1
58 #define CP15_ISAR2 15, 0, 0, 2, 2
59 #define CP15_ISAR3 15, 0, 0, 2, 3
60 #define CP15_ISAR4 15, 0, 0, 2, 4
61 #define CP15_ISAR5 15, 0, 0, 2, 5
62 #define CP15_ISAR6 15, 0, 0, 2, 6
63 #define CP15_ISAR7 15, 0, 0, 2, 7
64 #define CP15_SCTLR 15, 0, 1, 0, 0
65 #define CP15_ACTLR 15, 0, 1, 0, 1
66 #define CP15_CPACR 15, 0, 1, 0, 2
67 #define CP15_SCR 15, 0, 1, 1, 0
68 #define CP15_SDER 15, 0, 1, 1, 1
69 #define CP15_NSACR 15, 0, 1, 1, 2
70 #define CP15_TTBR0 15, 0, 2, 0, 0
71 #define CP15_TTBR1 15, 0, 2, 0, 1
72 #define CP15_TTBCR 15, 0, 2, 0, 2
73 #define CP15_DACR 15, 0, 3, 0, 0
74 #define CP15_DFSR 15, 0, 5, 0, 0
75 #define CP15_IFSR 15, 0, 5, 0, 1
76 #define CP15_DFAR 15, 0, 6, 0, 0
77 #define CP15_IFAR 15, 0, 6, 0, 2
78 #define CP15_ICIALLUIS 15, 0, 7, 1, 0
79 #define CP15_BPIALLIS 15, 0, 7, 1, 6
80 #define CP15_ICIALLU 15, 0, 7, 5, 0
81 #define CP15_ICIMVAU 15, 0, 7, 5, 1
82 #define CP15_BPIALL 15, 0, 7, 5, 6
83 #define CP15_BPIMVA 15, 0, 7, 5, 7
84 #define CP15_DCIMVAC 15, 0, 7, 6, 1
85 #define CP15_DCISW 15, 0, 7, 6, 2
86 #define CP15_DCCMVAC 15, 0, 7, 10, 1
87 #define CP15_DCCSW 15, 0, 7, 10, 2
88 #define CP15_DCCMVAU 15, 0, 7, 11, 1
89 #define CP15_DCCIMVAC 15, 0, 7, 14, 1
90 #define CP15_DCCISW 15, 0, 7, 14, 2
91 #define CP15_PAR 15, 0, 7, 4, 0
92 #define CP15_ATS1CPR 15, 0, 7, 8, 0
93 #define CP15_ATS1CPW 15, 0, 7, 8, 1
94 #define CP15_ATS1CUR 15, 0, 7, 8, 2
95 #define CP15_ATS1CUW 15, 0, 7, 8, 3
96 #define CP15_ISB 15, 0, 7, 5, 4
97 #define CP15_DSB 15, 0, 7, 10, 4
98 #define CP15_DMB 15, 0, 7, 10, 5
99 #define CP15_TLBIALLIS 15, 0, 8, 3, 0
100 #define CP15_TLBIMVAIS 15, 0, 8, 3, 1
101 #define CP15_TLBIASIDIS 15, 0, 8, 3, 2
102 #define CP15_TLBIMVAAIS 15, 0, 8, 3, 3
103 #define CP15_ITLBIALL 15, 0, 8, 5, 0
104 #define CP15_ITLBIMVA 15, 0, 8, 5, 1
105 #define CP15_ITLBIASID 15, 0, 8, 5, 2
106 #define CP15_DTLBIALL 15, 0, 8, 6, 0
107 #define CP15_DTLBIMVA 15, 0, 8, 6, 1
108 #define CP15_DTLBIASID 15, 0, 8, 6, 2
109 #define CP15_TLBIALL 15, 0, 8, 7, 0
110 #define CP15_TLBIMVA 15, 0, 8, 7, 1
111 #define CP15_TLBIASID 15, 0, 8, 7, 2
112 #define CP15_TLBIMVAA 15, 0, 8, 7, 3
113 #define CP15_PMCR 15, 0, 9, 12, 0
114 #define CP15_PMCNTENSET 15, 0, 9, 12, 1
115 #define CP15_PMCNTENCLR 15, 0, 9, 12, 2
116 #define CP15_PMOVSR 15, 0, 9, 12, 3
117 #define CP15_PSWINC 15, 0, 9, 12, 4
118 #define CP15_PMSELR 15, 0, 9, 12, 5
119 #define CP15_PMCCNTR 15, 0, 9, 13, 0
120 #define CP15_PMXEVTYPER 15, 0, 9, 13, 1
121 #define CP15_PMXEVCNTR 15, 0, 9, 13, 2
122 #define CP15_PMUSERENR 15, 0, 9, 14, 0
123 #define CP15_PMINTENSET 15, 0, 9, 14, 1
124 #define CP15_PMINTENCLR 15, 0, 9, 14, 2
125 #define CP15_PRRR 15, 0, 10, 2, 0
126 #define CP15_NMRR 15, 0, 10, 2, 1
127 #define CP15_VBAR 15, 0, 12, 0, 0
128 #define CP15_MVBAR 15, 0, 12, 0, 1
129 #define CP15_ISR 15, 0, 12, 1, 0
130 #define CP15_CONTEXTIDR 15, 0, 13, 0, 1
131 #define CP15_TPIDRURW 15, 0, 13, 0, 2
132 #define CP15_TPIDRURO 15, 0, 13, 0, 3
133 #define CP15_TPIDRPRW 15, 0, 13, 0, 4
134 #define CP15_CCSIDR 15, 1, 0, 0, 0
135 #define CP15_CLIDR 15, 1, 0, 0, 1
136 #define CP15_AIDR 15, 1, 0, 0, 7
137 #define CP15_CSSELR 15, 2, 0, 0, 0
138 #define CP14_DBGDIDR 14, 0, 0, 0, 0
139 #define CP14_DBGWFAR 14, 0, 0, 6, 0
140 #define CP14_DBGVCR 14, 0, 0, 7, 0
141 #define CP14_DBGECR 14, 0, 0, 9, 0
142 #define CP14_DBGDSCCR 14, 0, 0, 10, 0
143 #define CP14_DBGDSMCR 14, 0, 0, 11, 0
144 #define CP14_DBGDTRRX 14, 0, 0, 0, 2
145 #define CP14_DBGPCSR 14, 0, 0, 1, 2
146 #define CP14_DBGITR 14, 0, 0, 1, 2
147 #define CP14_DBGDSCR 14, 0, 0, 2, 2
148 #define CP14_DBGDTRTX 14, 0, 0, 3, 2
149 #define CP14_DBGDRCR 14, 0, 0, 4, 2
150 #define CP14_DBGCIDSR 14, 0, 0, 9, 2
151 #define CP14_DBGBVR0 14, 0, 0, 0, 4
152 #define CP14_DBGBVR1 14, 0, 0, 1, 4
153 #define CP14_DBGBVR2 14, 0, 0, 2, 4
154 #define CP14_DBGBVR3 14, 0, 0, 3, 4
155 #define CP14_DBGBVR4 14, 0, 0, 4, 4
156 #define CP14_DBGBVR5 14, 0, 0, 5, 4
157 #define CP14_DBGBVR6 14, 0, 0, 6, 4
158 #define CP14_DBGBVR7 14, 0, 0, 7, 4
159 #define CP14_DBGBCR0 14, 0, 0, 0, 5
160 #define CP14_DBGBCR1 14, 0, 0, 1, 5
161 #define CP14_DBGBCR2 14, 0, 0, 2, 5
162 #define CP14_DBGBCR3 14, 0, 0, 3, 5
163 #define CP14_DBGBCR4 14, 0, 0, 4, 5
164 #define CP14_DBGBCR5 14, 0, 0, 5, 5
165 #define CP14_DBGBCR6 14, 0, 0, 6, 5
166 #define CP14_DBGBCR7 14, 0, 0, 7, 5
167 #define CP14_DBGWVR0 14, 0, 0, 0, 6
168 #define CP14_DBGWVR1 14, 0, 0, 1, 6
169 #define CP14_DBGWVR2 14, 0, 0, 2, 6
170 #define CP14_DBGWVR3 14, 0, 0, 3, 6
171 #define CP14_DBGWCR0 14, 0, 0, 0, 7
172 #define CP14_DBGWCR1 14, 0, 0, 1, 7
173 #define CP14_DBGWCR2 14, 0, 0, 2, 7
174 #define CP14_DBGWCR3 14, 0, 0, 3, 7
175 #define CPVFP_FPSID 10, 7, 0, 0, 0
176 #define CPVFP_FPSCR 10, 7, 1, 0, 0
177 #define CPVFP_MVFR1 10, 7, 6, 0, 0
178 #define CPVFP_MVFR0 10, 7, 7, 0, 0
179 #define CPVFP_FPEXC 10, 7, 8, 0, 0
180 #define CP15_TTBRx_PD_MASK 0xffffc000
181
182
183 //
184 // CPSR Values
185 //
186 #define CPSRM_USER 0x10
187 #define CPSRM_FIQ 0x11
188 #define CPSRM_INT 0x12
189 #define CPSRM_SVC 0x13
190 #define CPSRM_ABT 0x17
191 #define CPSRM_UDF 0x1b
192 #define CPSRM_SYS 0x1f
193 #define CPSRM_MASK 0x1f
194 #define SYSCALL_PSR 0x30
195
196 #define CPSRF_N 0x80000000
197 #define CPSRF_Z 0x40000000
198 #define CPSRF_C 0x20000000
199 #define CPSRF_V 0x10000000
200 #define CPSRF_Q 0x08000000
201 #define CPSR_IT_MASK 0x600fc00
202
203 #define FPSCRF_N 0x80000000
204 #define FPSCRF_Z 0x40000000
205 #define FPSCRF_C 0x20000000
206 #define FPSCRF_V 0x10000000
207 #define FPSCRF_QC 0x08000000
208
209 #define FPSCRM_AHP 0x4000000
210 #define FPSCRM_DN 0x2000000
211 #define FPSCRM_FZ 0x1000000
212 #define FPSCRM_RMODE_MASK 0xc00000
213 #define FPSCRM_RMODE_RN 0x0
214 #define FPSCRM_RMODE_RP 0x400000
215 #define FPSCRM_RMODE_RM 0x800000
216 #define FPSCRM_RMODE_RZ 0xc00000
217 #define FPSCRM_DEPRECATED 0x370000
218
219 #define FPSCR_IDE 0x8000
220 #define FPSCR_IXE 0x1000
221 #define FPSCR_UFE 0x800
222 #define FPSCR_OFE 0x400
223 #define FPSCR_DZE 0x200
224 #define FPSCR_IOE 0x100
225 #define FPSCR_IDC 0x80
226 #define FPSCR_IXC 0x10
227 #define FPSCR_UFC 0x8
228 #define FPSCR_OFC 0x4
229 #define FPSCR_DZC 0x2
230 #define FPSCR_IOC 0x1
231
232 #define CPSRC_INT 0x80
233 #define CPSRC_ABORT 0x100
234 #define CPSRC_THUMB 0x20
235
236 #define SWFS_PAGE_FAULT 0x10
237 #define SWFS_ALIGN_FAULT 0x20
238 #define SWFS_HWERR_FAULT 0x40
239 #define SWFS_DEBUG_FAULT 0x80
240 #define SWFS_EXECUTE 0x8
241 #define SWFS_WRITE 0x1
242
243 #define CP14_DBGDSCR_MOE_MASK 0x3c
244 #define CP14_DBGDSCR_MOE_SHIFT 0x2
245 #define CP14_DBGDSCR_MOE_HALT 0x0
246 #define CP14_DBGDSCR_MOE_BP 0x1
247 #define CP14_DBGDSCR_MOE_WPASYNC 0x2
248 #define CP14_DBGDSCR_MOE_BKPT 0x3
249 #define CP14_DBGDSCR_MOE_EXTERNAL 0x4
250 #define CP14_DBGDSCR_MOE_VECTOR 0x5
251 #define CP14_DBGDSCR_MOE_WPSYNC 0xa
252
253 #define CP15_PMCR_DP 0x20
254 #define CP15_PMCR_X 0x10
255 #define CP15_PMCR_CLKCNT_DIV 0x8
256 #define CP15_PMCR_CLKCNT_RST 0x4
257 #define CP15_PMCR_CNT_RST 0x2
258 #define CP15_PMCR_ENABLE 0x1
259
260 //
261 // C1 Register Values
262 //
263 #define C1_MMU_CONTROL 0x01
264 #define C1_ALIGNMENT_CONTROL 0x02
265 #define C1_DCACHE_CONTROL 0x04
266 #define C1_ICACHE_CONTROL 0x1000
267 #define C1_VECTOR_CONTROL 0x2000
268
269 //
270 // IPI Types
271 //
272 #define IPI_APC 1
273 #define IPI_DPC 2
274 #define IPI_FREEZE 4
275 #define IPI_PACKET_READY 6
276 #define IPI_SYNCH_REQUEST 16
277
278 //
279 // PRCB Flags
280 //
281 #define PRCB_MINOR_VERSION 1
282 #define PRCB_MAJOR_VERSION 1
283 #define PRCB_BUILD_DEBUG 1
284 #define PRCB_BUILD_UNIPROCESSOR 2
285
286 //
287 // No LDTs on ARM
288 //
289 #define LDT_ENTRY ULONG
290
291 //
292 // HAL Variables
293 //
294 #define INITIAL_STALL_COUNT 100
295 #define MM_HAL_VA_START 0xFFC00000
296 #define MM_HAL_VA_END 0xFFFFFFFF
297
298 //
299 // Static Kernel-Mode Address start (use MM_KSEG0_BASE for actual)
300 //
301 #define KSEG0_BASE 0x80000000
302
303 //
304 // Synchronization-level IRQL
305 //
306 #define SYNCH_LEVEL DISPATCH_LEVEL
307
308 //
309 // Double fault stack size
310 //
311 #define DOUBLE_FAULT_STACK_SIZE 0x3000
312
313 //
314 // Number of pool lookaside lists per pool in the PRCB
315 //
316 #define NUMBER_POOL_LOOKASIDE_LISTS 32
317
318 //
319 // Structure for CPUID info
320 //
321 typedef union _CPU_INFO
322 {
323 ULONG Dummy;
324 } CPU_INFO, *PCPU_INFO;
325
326
327 //
328 // ARM VFP State
329 // Based on Windows RT 8.1 symbols and ksarm.h
330 //
331 typedef struct _KARM_VFP_STATE
332 {
333 struct _KARM_VFP_STATE* Link; // 0x00
334 ULONG Fpscr; // 0x04
335 ULONG Reserved; // 0x08
336 ULONG Reserved2; // 0x0c
337 ULONGLONG VfpD[32]; // 0x10
338 } KARM_VFP_STATE, *PKARM_VFP_STATE; // size = 0x110
339
340 //
341 // Trap Frame Definition
342 // Based on Windows RT 8.1 symbols and ksarm.h
343 //
344 typedef struct _KTRAP_FRAME
345 {
346 ULONG Arg3;
347 ULONG FaultStatus;
348 union
349 {
350 ULONG FaultAddress;
351 ULONG TrapFrame;
352 };
353 ULONG Reserved;
354 BOOLEAN ExceptionActive;
355 BOOLEAN ContextFromKFramesUnwound;
356 BOOLEAN DebugRegistersValid;
357 union
358 {
359 CHAR PreviousMode;
360 KIRQL PreviousIrql;
361 };
362 PKARM_VFP_STATE VfpState;
363 ULONG Bvr[8];
364 ULONG Bcr[8];
365 ULONG Wvr[1];
366 ULONG Wcr[1];
367 ULONG R0;
368 ULONG R1;
369 ULONG R2;
370 ULONG R3;
371 ULONG R12;
372 ULONG Sp;
373 ULONG Lr;
374 ULONG R11;
375 ULONG Pc;
376 ULONG Cpsr;
377 } KTRAP_FRAME, *PKTRAP_FRAME;
378
379 #ifndef NTOS_MODE_USER
380
381 //
382 // Exception Frame Definition
383 // FIXME: this should go into ntddk.h
384 //
385 typedef struct _KEXCEPTION_FRAME
386 {
387 ULONG Param5; // 0x00
388 ULONG TrapFrame; // 0x04
389 ULONG OutputBuffer; // 0x08
390 ULONG OutputLength; // 0x0c
391 ULONG Pad; // 0x04
392 ULONG R4; // 0x14
393 ULONG R5; // 0x18
394 ULONG R6; // 0x1c
395 ULONG R7; // 0x20
396 ULONG R8; // 0x24
397 ULONG R9; // 0x28
398 ULONG R10; // 0x2c
399 ULONG R11; // 0x30
400 ULONG Return; // 0x34
401 } KEXCEPTION_FRAME, *PKEXCEPTION_FRAME; // size = 0x38
402
403 //
404 // ARM Architecture State
405 // Based on Windows RT 8.1 symbols and ksarm.h
406 //
407 typedef struct _KARM_ARCH_STATE
408 {
409 ULONG Cp15_Cr0_CpuId;
410 ULONG Cp15_Cr1_Control;
411 ULONG Cp15_Cr1_AuxControl;
412 ULONG Cp15_Cr1_Cpacr;
413 ULONG Cp15_Cr2_TtbControl;
414 ULONG Cp15_Cr2_Ttb0;
415 ULONG Cp15_Cr2_Ttb1;
416 ULONG Cp15_Cr3_Dacr;
417 ULONG Cp15_Cr5_Dfsr;
418 ULONG Cp15_Cr5_Ifsr;
419 ULONG Cp15_Cr6_Dfar;
420 ULONG Cp15_Cr6_Ifar;
421 ULONG Cp15_Cr9_PmControl;
422 ULONG Cp15_Cr9_PmCountEnableSet;
423 ULONG Cp15_Cr9_PmCycleCounter;
424 ULONG Cp15_Cr9_PmEventCounter[31];
425 ULONG Cp15_Cr9_PmEventType[31];
426 ULONG Cp15_Cr9_PmInterruptSelect;
427 ULONG Cp15_Cr9_PmOverflowStatus;
428 ULONG Cp15_Cr9_PmSelect;
429 ULONG Cp15_Cr9_PmUserEnable;
430 ULONG Cp15_Cr10_PrimaryMemoryRemap;
431 ULONG Cp15_Cr10_NormalMemoryRemap;
432 ULONG Cp15_Cr12_VBARns;
433 ULONG Cp15_Cr13_ContextId;
434 } KARM_ARCH_STATE, *PKARM_ARCH_STATE;
435
436 ///
437 /// "Custom" definition start
438 ///
439
440 //
441 // ARM Internal Registers
442 //
443 typedef union _ARM_TTB_REGISTER
444 {
445 struct
446 {
447 ULONG Reserved:14;
448 ULONG BaseAddress:18;
449 };
450 ULONG AsUlong;
451 } ARM_TTB_REGISTER;
452
453 typedef union _ARM_STATUS_REGISTER
454 {
455
456 struct
457 {
458 ULONG Mode:5;
459 ULONG State:1;
460 ULONG FiqDisable:1;
461 ULONG IrqDisable:1;
462 ULONG ImpreciseAbort:1;
463 ULONG Endianness:1;
464 ULONG Sbz:6;
465 ULONG GreaterEqual:4;
466 ULONG Sbz1:4;
467 ULONG Java:1;
468 ULONG Sbz2:2;
469 ULONG StickyOverflow:1;
470 ULONG Overflow:1;
471 ULONG CarryBorrowExtend:1;
472 ULONG Zero:1;
473 ULONG NegativeLessThan:1;
474 };
475 ULONG AsUlong;
476 } ARM_STATUS_REGISTER;
477
478 typedef union _ARM_DOMAIN_REGISTER
479 {
480 struct
481 {
482 ULONG Domain0:2;
483 ULONG Domain1:2;
484 ULONG Domain2:2;
485 ULONG Domain3:2;
486 ULONG Domain4:2;
487 ULONG Domain5:2;
488 ULONG Domain6:2;
489 ULONG Domain7:2;
490 ULONG Domain8:2;
491 ULONG Domain9:2;
492 ULONG Domain10:2;
493 ULONG Domain11:2;
494 ULONG Domain12:2;
495 ULONG Domain13:2;
496 ULONG Domain14:2;
497 ULONG Domain15:2;
498 };
499 ULONG AsUlong;
500 } ARM_DOMAIN_REGISTER;
501
502 typedef union _ARM_CONTROL_REGISTER
503 {
504 struct
505 {
506 ULONG MmuEnabled:1;
507 ULONG AlignmentFaultsEnabled:1;
508 ULONG DCacheEnabled:1;
509 ULONG Sbo:4;
510 ULONG BigEndianEnabled:1;
511 ULONG System:1;
512 ULONG Rom:1;
513 ULONG Sbz:2;
514 ULONG ICacheEnabled:1;
515 ULONG HighVectors:1;
516 ULONG RoundRobinReplacementEnabled:1;
517 ULONG Armv4Compat:1;
518 ULONG Ignored:6;
519 ULONG UnalignedAccess:1;
520 ULONG ExtendedPageTables:1;
521 ULONG Sbz1:1;
522 ULONG ExceptionBit:1;
523 ULONG Sbz2:1;
524 ULONG Nmif:1;
525 ULONG TexRemap:1;
526 ULONG ForceAp:1;
527 ULONG Reserved:2;
528 };
529 ULONG AsUlong;
530 } ARM_CONTROL_REGISTER, *PARM_CONTROL_REGISTER;
531
532 C_ASSERT(sizeof(ARM_CONTROL_REGISTER) == sizeof(ULONG));
533
534 typedef union _ARM_ID_CODE_REGISTER
535 {
536 struct
537 {
538 ULONG Revision:4;
539 ULONG PartNumber:12;
540 ULONG Architecture:4;
541 ULONG Variant:4;
542 ULONG Identifier:8;
543 };
544 ULONG AsUlong;
545 } ARM_ID_CODE_REGISTER, *PARM_ID_CODE_REGISTER;
546
547 typedef union _ARM_CACHE_REGISTER
548 {
549 struct
550 {
551 ULONG ILength:2;
552 ULONG IMultipler:1;
553 ULONG IAssociativty:3;
554 ULONG ISize:4;
555 ULONG IReserved:2;
556 ULONG DLength:2;
557 ULONG DMultipler:1;
558 ULONG DAssociativty:3;
559 ULONG DSize:4;
560 ULONG DReserved:2;
561 ULONG Separate:1;
562 ULONG CType:4;
563 ULONG Reserved:3;
564 };
565 ULONG AsUlong;
566 } ARM_CACHE_REGISTER, *PARM_CACHE_REGISTER;
567
568 typedef union _ARM_LOCKDOWN_REGISTER
569 {
570 struct
571 {
572 ULONG Preserve:1;
573 ULONG Ignored:25;
574 ULONG Victim:3;
575 ULONG Reserved:3;
576 };
577 ULONG AsUlong;
578 } ARM_LOCKDOWN_REGISTER, *PARM_LOCKDOWN_REGISTER;
579
580 //
581 // ARM Domains
582 //
583 typedef enum _ARM_DOMAINS
584 {
585 Domain0,
586 Domain1,
587 Domain2,
588 Domain3,
589 Domain4,
590 Domain5,
591 Domain6,
592 Domain7,
593 Domain8,
594 Domain9,
595 Domain10,
596 Domain11,
597 Domain12,
598 Domain13,
599 Domain14,
600 Domain15
601 } ARM_DOMAINS;
602
603 ///
604 /// "Custom" definition end
605 ///
606
607 typedef struct _DESCRIPTOR
608 {
609 USHORT Pad;
610 USHORT Dummy1;
611 ULONG Dummy2;
612 } KDESCRIPTOR, *PKDESCRIPTOR;
613
614
615 //
616 // Special Registers Structure (outside of CONTEXT)
617 // Based on Windows RT 8.1 symbols and ksarm.h
618 //
619 typedef struct _KSPECIAL_REGISTERS
620 {
621 ULONG Reserved[7]; // 0x00
622 ULONG Cp15_Cr13_UsrRW; // 0x1c
623 ULONG Cp15_Cr13_UsrRO; // 0x20
624 ULONG Cp15_Cr13_SvcRW; // 0x24
625 ULONG KernelBvr[8]; // 0x28
626 ULONG KernelBcr[8]; // 0x48
627 ULONG KernelWvr[1]; // 0x68
628 ULONG KernelWcr[1]; // 0x6c
629 ULONG Fpexc; // 0x70
630 ULONG Fpinst; // 0x74
631 ULONG Fpinst2; // 0x78
632 ULONG UserSp; // 0x7c
633 ULONG UserLr; // 0x80
634 ULONG AbortSp; // 0x84
635 ULONG AbortLr; // 0x88
636 ULONG AbortSpsr; // 0x8c
637 ULONG UdfSp; // 0x90
638 ULONG UdfLr; // 0x94
639 ULONG UdfSpsr; // 0x98
640 ULONG IrqSp; // 0x9c
641 ULONG IrqLr; // 0xa0
642 ULONG IrqSpsr; // 0xa4
643 } KSPECIAL_REGISTERS, *PKSPECIAL_REGISTERS;
644
645 //
646 // Processor State
647 // Based on Windows RT 8.1 symbols and ksarm.h
648 //
649 typedef struct _KPROCESSOR_STATE
650 {
651 KSPECIAL_REGISTERS SpecialRegisters; // 0x000
652 KARM_ARCH_STATE ArchState; // 0x0a8
653 CONTEXT ContextFrame; // 0x200
654 } KPROCESSOR_STATE, *PKPROCESSOR_STATE;
655 C_ASSERT(sizeof(KPROCESSOR_STATE) == 0x3a0);
656
657 //
658 // ARM Mini Stack
659 // Based on Windows RT 8.1 symbols and ksarm.h
660 //
661 typedef struct _KARM_MINI_STACK
662 {
663 ULONG Pc;
664 ULONG Cpsr;
665 ULONG R4;
666 ULONG R5;
667 ULONG R6;
668 ULONG R7;
669 ULONG Reserved[2];
670 } KARM_MINI_STACK, *PKARM_MINI_STACK; // size = 0x20
671
672 typedef struct _DISPATCHER_CONTEXT
673 {
674 ULONG ControlPc; // 0x0
675 PVOID ImageBase; // 0x4
676 PVOID FunctionEntry; // 0x8
677 PVOID EstablisherFrame; // 0xc
678 ULONG TargetPc; // 0x10
679 PVOID ContextRecord; // 0x14
680 PVOID LanguageHandler; // 0x18
681 PVOID HandlerData; // 0x1c
682 PVOID HistoryTable; // 0x20
683 ULONG ScopeIndex; // 0x24
684 ULONG ControlPcIsUnwound; // 0x28
685 PVOID NonVolatileRegisters; // 0x2c
686 ULONG Reserved; // 0x30
687 } DISPATCHER_CONTEXT, *PDISPATCHER_CONTEXT;
688
689 //
690 // Machine Frame
691 // Based on ksarm.h
692 //
693 typedef struct _MACHINE_FRAME
694 {
695 ULONG Sp;
696 ULONG Pc;
697 } MACHINE_FRAME, *PMACHINE_FRAME;
698
699 //
700 // Defines the Callback Stack Layout for User Mode Callbacks
701 //
702 typedef KEXCEPTION_FRAME KCALLOUT_FRAME, PKCALLOUT_FRAME;
703
704 //
705 // User mode callout frame
706 //
707 typedef struct _UCALLOUT_FRAME
708 {
709 PVOID Buffer;
710 ULONG Length;
711 ULONG ApiNumber;
712 ULONG OriginalLr;
713 MACHINE_FRAME MachineFrame;
714 } UCALLOUT_FRAME, *PUCALLOUT_FRAME;
715
716 typedef struct _KSTART_FRAME
717 {
718 ULONG R0;
719 ULONG R1;
720 ULONG R2;
721 ULONG Return;
722 } KSTART_FRAME, *PKSTART_FRAME;
723
724 typedef struct _KSWITCH_FRAME
725 {
726 KIRQL ApcBypass;
727 UCHAR Fill[7];
728 ULONG R11;
729 ULONG Return;
730 } KSWITCH_FRAME, *PKSWITCH_FRAME;
731
732 //
733 // Cache types
734 // (These are made up constants!)
735 //
736 enum _ARM_CACHE_TYPES
737 {
738 FirstLevelDcache = 0,
739 SecondLevelDcache = 1,
740 FirstLevelIcache = 2,
741 SecondLevelIcache = 3,
742 GlobalDcache = 4,
743 GlobalIcache = 5
744 };
745
746 #if (NTDDI_VERSION < NTDDI_LONGHORN)
747 #define GENERAL_LOOKASIDE_POOL PP_LOOKASIDE_LIST
748 #endif
749
750 //
751 // Processor Region Control Block
752 // Based on Windows RT 8.1 symbols
753 //
754 typedef struct _KPRCB
755 {
756 UCHAR LegacyNumber;
757 UCHAR ReservedMustBeZero;
758 UCHAR IdleHalt;
759 PKTHREAD CurrentThread;
760 PKTHREAD NextThread;
761 PKTHREAD IdleThread;
762 UCHAR NestingLevel;
763 UCHAR ClockOwner;
764 union
765 {
766 UCHAR PendingTickFlags;
767 struct
768 {
769 UCHAR PendingTick : 1;
770 UCHAR PendingBackupTick : 1;
771 };
772 };
773 UCHAR PrcbPad00[1];
774 ULONG Number;
775 ULONG PrcbLock;
776 PCHAR PriorityState;
777 KPROCESSOR_STATE ProcessorState;
778 USHORT ProcessorModel;
779 USHORT ProcessorRevision;
780 ULONG MHz;
781 UINT64 CycleCounterFrequency;
782 ULONG HalReserved[15];
783 USHORT MinorVersion;
784 USHORT MajorVersion;
785 UCHAR BuildType;
786 UCHAR CpuVendor;
787 UCHAR CoresPerPhysicalProcessor;
788 UCHAR LogicalProcessorsPerCore;
789 PVOID AcpiReserved;
790 ULONG GroupSetMember;
791 UCHAR Group;
792 UCHAR GroupIndex;
793 //UCHAR _PADDING1_[0x62];
794 KSPIN_LOCK_QUEUE DECLSPEC_ALIGN(128) LockQueue[17];
795 UCHAR ProcessorVendorString[2];
796 UCHAR _PADDING2_[0x2];
797 ULONG FeatureBits;
798 ULONG MaxBreakpoints;
799 ULONG MaxWatchpoints;
800 PCONTEXT Context;
801 ULONG ContextFlagsInit;
802 //UCHAR _PADDING3_[0x60];
803 PP_LOOKASIDE_LIST DECLSPEC_ALIGN(128) PPLookasideList[16];
804 LONG PacketBarrier;
805 SINGLE_LIST_ENTRY DeferredReadyListHead;
806 LONG MmPageFaultCount;
807 LONG MmCopyOnWriteCount;
808 LONG MmTransitionCount;
809 LONG MmDemandZeroCount;
810 LONG MmPageReadCount;
811 LONG MmPageReadIoCount;
812 LONG MmDirtyPagesWriteCount;
813 LONG MmDirtyWriteIoCount;
814 LONG MmMappedPagesWriteCount;
815 LONG MmMappedWriteIoCount;
816 ULONG KeSystemCalls;
817 ULONG KeContextSwitches;
818 ULONG CcFastReadNoWait;
819 ULONG CcFastReadWait;
820 ULONG CcFastReadNotPossible;
821 ULONG CcCopyReadNoWait;
822 ULONG CcCopyReadWait;
823 ULONG CcCopyReadNoWaitMiss;
824 LONG LookasideIrpFloat;
825 LONG IoReadOperationCount;
826 LONG IoWriteOperationCount;
827 LONG IoOtherOperationCount;
828 LARGE_INTEGER IoReadTransferCount;
829 LARGE_INTEGER IoWriteTransferCount;
830 LARGE_INTEGER IoOtherTransferCount;
831 UCHAR _PADDING4_[0x8];
832 struct _REQUEST_MAILBOX* Mailbox;
833 LONG TargetCount;
834 ULONG IpiFrozen;
835 ULONG RequestSummary;
836 KDPC_DATA DpcData[2];
837 PVOID DpcStack;
838 PVOID SpBase;
839 LONG MaximumDpcQueueDepth;
840 ULONG DpcRequestRate;
841 ULONG MinimumDpcRate;
842 ULONG DpcLastCount;
843 UCHAR ThreadDpcEnable;
844 UCHAR QuantumEnd;
845 UCHAR DpcRoutineActive;
846 UCHAR IdleSchedule;
847 #if (NTDDI_VERSION >= NTDDI_WIN8)
848 union
849 {
850 LONG DpcRequestSummary;
851 SHORT DpcRequestSlot[2];
852 struct
853 {
854 SHORT NormalDpcState;
855 SHORT ThreadDpcState;
856 };
857 struct
858 {
859 ULONG DpcNormalProcessingActive : 1;
860 ULONG DpcNormalProcessingRequested : 1;
861 ULONG DpcNormalThreadSignal : 1;
862 ULONG DpcNormalTimerExpiration : 1;
863 ULONG DpcNormalDpcPresent : 1;
864 ULONG DpcNormalLocalInterrupt : 1;
865 ULONG DpcNormalSpare : 10;
866 ULONG DpcThreadActive : 1;
867 ULONG DpcThreadRequested : 1;
868 ULONG DpcThreadSpare : 14;
869 };
870 };
871 #else
872 LONG DpcSetEventRequest;
873 #endif
874 ULONG LastTimerHand;
875 ULONG LastTick;
876 ULONG ClockInterrupts;
877 ULONG ReadyScanTick;
878 ULONG PrcbPad10[1];
879 ULONG InterruptLastCount;
880 ULONG InterruptRate;
881 UCHAR _PADDING5_[0x4];
882 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
883 KGATE DpcGate;
884 #else
885 KEVENT DpcEvent;
886 #endif
887 ULONG MPAffinity;
888 KDPC CallDpc;
889 LONG ClockKeepAlive;
890 UCHAR ClockCheckSlot;
891 UCHAR ClockPollCycle;
892 //UCHAR _PADDING6_[0x2];
893 LONG DpcWatchdogPeriod;
894 LONG DpcWatchdogCount;
895 LONG KeSpinLockOrdering;
896 UCHAR _PADDING7_[0x38];
897 LIST_ENTRY WaitListHead;
898 ULONG WaitLock;
899 ULONG ReadySummary;
900 LONG AffinitizedSelectionMask;
901 ULONG QueueIndex;
902 KDPC TimerExpirationDpc;
903 //RTL_RB_TREE ScbQueue;
904 LIST_ENTRY ScbList;
905 UCHAR _PADDING8_[0x38];
906 LIST_ENTRY DispatcherReadyListHead[32];
907 ULONG InterruptCount;
908 ULONG KernelTime;
909 ULONG UserTime;
910 ULONG DpcTime;
911 ULONG InterruptTime;
912 ULONG AdjustDpcThreshold;
913 UCHAR SkipTick;
914 UCHAR DebuggerSavedIRQL;
915 UCHAR PollSlot;
916 UCHAR GroupSchedulingOverQuota;
917 ULONG DpcTimeCount;
918 ULONG DpcTimeLimit;
919 ULONG PeriodicCount;
920 ULONG PeriodicBias;
921 ULONG AvailableTime;
922 ULONG ScbOffset;
923 ULONG KeExceptionDispatchCount;
924 struct _KNODE* ParentNode;
925 UCHAR _PADDING9_[0x4];
926 ULONG64 AffinitizedCycles;
927 ULONG64 StartCycles;
928 ULONG64 GenerationTarget;
929 ULONG64 CycleCounterHigh;
930 #if (NTDDI_VERSION >= NTDDI_WIN8)
931 KENTROPY_TIMING_STATE EntropyTimingState;
932 #endif /* (NTDDI_VERSION >= NTDDI_WIN8) */
933 LONG MmSpinLockOrdering;
934 ULONG PageColor;
935 ULONG NodeColor;
936 ULONG NodeShiftedColor;
937 ULONG SecondaryColorMask;
938 ULONG64 CycleTime;
939 UCHAR _PADDING10_[0x58];
940 ULONG CcFastMdlReadNoWait;
941 ULONG CcFastMdlReadWait;
942 ULONG CcFastMdlReadNotPossible;
943 ULONG CcMapDataNoWait;
944 ULONG CcMapDataWait;
945 ULONG CcPinMappedDataCount;
946 ULONG CcPinReadNoWait;
947 ULONG CcPinReadWait;
948 ULONG CcMdlReadNoWait;
949 ULONG CcMdlReadWait;
950 ULONG CcLazyWriteHotSpots;
951 ULONG CcLazyWriteIos;
952 ULONG CcLazyWritePages;
953 ULONG CcDataFlushes;
954 ULONG CcDataPages;
955 ULONG CcLostDelayedWrites;
956 ULONG CcFastReadResourceMiss;
957 ULONG CcCopyReadWaitMiss;
958 ULONG CcFastMdlReadResourceMiss;
959 ULONG CcMapDataNoWaitMiss;
960 ULONG CcMapDataWaitMiss;
961 ULONG CcPinReadNoWaitMiss;
962 ULONG CcPinReadWaitMiss;
963 ULONG CcMdlReadNoWaitMiss;
964 ULONG CcMdlReadWaitMiss;
965 ULONG CcReadAheadIos;
966 LONG MmCacheTransitionCount;
967 LONG MmCacheReadCount;
968 LONG MmCacheIoCount;
969 UCHAR _PADDING11_[0xC];
970 PROCESSOR_POWER_STATE PowerState;
971 ULONG SharedReadyQueueOffset;
972 ULONG PrcbPad15[2];
973 ULONG DeviceInterrupts;
974 PVOID IsrDpcStats;
975 ULONG KeAlignmentFixupCount;
976 KDPC DpcWatchdogDpc;
977 KTIMER DpcWatchdogTimer;
978 SLIST_HEADER InterruptObjectPool;
979 //KAFFINITY_EX PackageProcessorSet;
980 UCHAR _PADDING12_[0x4];
981 ULONG SharedReadyQueueMask;
982 struct _KSHARED_READY_QUEUE* SharedReadyQueue;
983 ULONG CoreProcessorSet;
984 ULONG ScanSiblingMask;
985 ULONG LLCMask;
986 ULONG CacheProcessorMask[5];
987 ULONG ScanSiblingIndex;
988 CACHE_DESCRIPTOR Cache[6];
989 UCHAR CacheCount;
990 UCHAR PrcbPad20[3];
991 ULONG CachedCommit;
992 ULONG CachedResidentAvailable;
993 PVOID HyperPte;
994 PVOID WheaInfo;
995 PVOID EtwSupport;
996 UCHAR _PADDING13_[0x74];
997 SYNCH_COUNTERS SynchCounters;
998 //FILESYSTEM_DISK_COUNTERS FsCounters;
999 UCHAR _PADDING14_[0x8];
1000 KARM_MINI_STACK FiqMiniStack;
1001 KARM_MINI_STACK IrqMiniStack;
1002 KARM_MINI_STACK UdfMiniStack;
1003 KARM_MINI_STACK AbtMiniStack;
1004 KARM_MINI_STACK PanicMiniStack;
1005 ULONG PanicStackBase;
1006 PVOID IsrStack;
1007 ULONG PteBitCache;
1008 ULONG PteBitOffset;
1009 KTIMER_TABLE TimerTable;
1010 GENERAL_LOOKASIDE_POOL PPNxPagedLookasideList[32];
1011 GENERAL_LOOKASIDE_POOL PPNPagedLookasideList[32];
1012 GENERAL_LOOKASIDE_POOL PPPagedLookasideList[32];
1013 SINGLE_LIST_ENTRY AbSelfIoBoostsList;
1014 SINGLE_LIST_ENTRY AbPropagateBoostsList;
1015 KDPC AbDpc;
1016 UCHAR _PADDING15_[0x58];
1017 //REQUEST_MAILBOX RequestMailbox[1];
1018
1019 // FIXME: Oldstyle stuff
1020 #if (NTDDI_VERSION < NTDDI_WIN8) // FIXME
1021 UCHAR CpuType;
1022 volatile UCHAR DpcInterruptRequested;
1023 volatile UCHAR DpcThreadRequested;
1024 volatile UCHAR DpcThreadActive;
1025 volatile ULONG TimerHand;
1026 volatile ULONG TimerRequest;
1027 ULONG DebugDpcTime;
1028 LONG Sleeping;
1029 KAFFINITY SetMember;
1030 CHAR VendorString[13];
1031 #endif
1032
1033 } KPRCB, *PKPRCB;
1034 C_ASSERT(FIELD_OFFSET(KPRCB, ProcessorState) == 0x20);
1035 C_ASSERT(FIELD_OFFSET(KPRCB, ProcessorModel) == 0x3C0);
1036 C_ASSERT(FIELD_OFFSET(KPRCB, LockQueue) == 0x480);
1037 C_ASSERT(FIELD_OFFSET(KPRCB, PacketBarrier) == 0x600);
1038 C_ASSERT(FIELD_OFFSET(KPRCB, Mailbox) == 0x680);
1039 C_ASSERT(FIELD_OFFSET(KPRCB, DpcData) == 0x690);
1040 C_ASSERT(FIELD_OFFSET(KPRCB, DpcStack) == 0x6c0);
1041 //C_ASSERT(FIELD_OFFSET(KPRCB, CallDpc) == 0x714);
1042
1043
1044 //
1045 // Processor Control Region
1046 // Based on Windows RT 8.1 symbols
1047 //
1048 typedef struct _KIPCR
1049 {
1050 union
1051 {
1052 NT_TIB NtTib;
1053 struct
1054 {
1055 ULONG TibPad0[2];
1056 PVOID Spare1;
1057 struct _KPCR *Self;
1058 struct _KPRCB *CurrentPrcb;
1059 struct _KSPIN_LOCK_QUEUE* LockArray;
1060 PVOID Used_Self;
1061 };
1062 };
1063 KIRQL CurrentIrql;
1064 UCHAR SecondLevelCacheAssociativity;
1065 ULONG Unused0[3];
1066 USHORT MajorVersion;
1067 USHORT MinorVersion;
1068 ULONG StallScaleFactor;
1069 PVOID Unused1[3];
1070 ULONG KernelReserved[15];
1071 ULONG SecondLevelCacheSize;
1072 union
1073 {
1074 USHORT SoftwareInterruptPending;
1075 struct
1076 {
1077 UCHAR ApcInterrupt;
1078 UCHAR DispatchInterrupt;
1079 };
1080 };
1081 USHORT InterruptPad;
1082 ULONG HalReserved[32];
1083 PVOID KdVersionBlock;
1084 PVOID Unused3;
1085 ULONG PcrAlign1[8];
1086
1087 /* Private members, not in ntddk.h */
1088 PVOID Idt[256];
1089 PVOID* IdtExt;
1090 ULONG PcrAlign2[19];
1091 UCHAR _PADDING1_[0x4];
1092 KPRCB Prcb;
1093 } KIPCR, *PKIPCR;
1094
1095 C_ASSERT(FIELD_OFFSET(KIPCR, Prcb.LegacyNumber) == 0x580);
1096
1097 //
1098 // Macro to get current KPRCB
1099 //
1100 FORCEINLINE
1101 struct _KPRCB *
KeGetCurrentPrcb(VOID)1102 KeGetCurrentPrcb(VOID)
1103 {
1104 return KeGetPcr()->CurrentPrcb;
1105 }
1106
1107 //
1108 // Just read it from the PCR
1109 //
1110 #define KeGetCurrentIrql() KeGetPcr()->CurrentIrql
1111 #define _KeGetCurrentThread() KeGetCurrentPrcb()->CurrentThread
1112 #define _KeGetPreviousMode() KeGetCurrentPrcb()->CurrentThread->PreviousMode
1113 #define _KeIsExecutingDpc() (KeGetCurrentPrcb()->DpcRoutineActive != 0)
1114 #define KeGetCurrentThread() _KeGetCurrentThread()
1115 #define KeGetPreviousMode() _KeGetPreviousMode()
1116 //#define KeGetDcacheFillSize() PCR->DcacheFillSize
1117
1118 #endif // !NTOS_MODE_USER
1119
1120 #ifdef __cplusplus
1121 }; // extern "C"
1122 #endif
1123
1124 #endif // !_ARM_KETYPES_H
1125