/dports/databases/postgis30/postgis-3.0.4/topology/test/regress/ |
H A D | st_remedgemodface_expected | 10 RM(25)|1 16 RM(4)|0 22 RM(26)|1 27 RM(9)|6 40 RM(19)|4 57 RM(10)|4 66 RM(20)|4 72 RM(15)|0 81 RM(2)|0 93 RM(27)|0 [all …]
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/dports/databases/postgis25/postgis-2.5.5/topology/test/regress/ |
H A D | st_remedgemodface_expected | 12 RM(25)|1 18 RM(4)|0 24 RM(26)|1 29 RM(9)|6 42 RM(19)|4 59 RM(10)|4 68 RM(20)|4 74 RM(15)|0 83 RM(2)|0 95 RM(27)|0 [all …]
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/dports/databases/postgis32/postgis-3.2.0/topology/test/regress/ |
H A D | st_remedgemodface_expected | 6 RM(25)|1 12 RM(4)|0 18 RM(26)|1 23 RM(9)|6 36 RM(19)|4 53 RM(10)|4 62 RM(20)|4 68 RM(15)|0 77 RM(2)|0 89 RM(27)|0 [all …]
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/dports/databases/postgis31/postgis-3.1.4/topology/test/regress/ |
H A D | st_remedgemodface_expected | 10 RM(25)|1 16 RM(4)|0 22 RM(26)|1 27 RM(9)|6 40 RM(19)|4 57 RM(10)|4 66 RM(20)|4 72 RM(15)|0 81 RM(2)|0 93 RM(27)|0 [all …]
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/dports/games/libretro-fbneo/FBNeo-bbe3c05/src/cpu/z180/ |
H A D | z180xy.c | 5 OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */ 11 OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */ 20 OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */ 29 OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */ 83 OP(xycb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */ 92 OP(xycb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */ 101 OP(xycb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */ 110 OP(xycb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */ 119 OP(xycb,66) { BIT_XY(4,RM(EA)); } /* BIT 4,(XY+o) */ 128 OP(xycb,6e) { BIT_XY(5,RM(EA)); } /* BIT 5,(XY+o) */ [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/z180/ |
H A D | z180xy.hxx | 7 OP(xycb,00) { _B = RLC(RM(m_ea) ); WM( m_ea,_B ); } /* RLC B=(XY+o) */ 8 OP(xycb,01) { _C = RLC(RM(m_ea) ); WM( m_ea,_C ); } /* RLC C=(XY+o) */ 9 OP(xycb,02) { _D = RLC(RM(m_ea) ); WM( m_ea,_D ); } /* RLC D=(XY+o) */ 10 OP(xycb,03) { _E = RLC(RM(m_ea) ); WM( m_ea,_E ); } /* RLC E=(XY+o) */ 11 OP(xycb,04) { _H = RLC(RM(m_ea) ); WM( m_ea,_H ); } /* RLC H=(XY+o) */ 22 OP(xycb,0e) { WM( m_ea,RRC(RM(m_ea) ) ); } /* RRC (XY+o) */ 25 OP(xycb,10) { _B = RL(RM(m_ea) ); WM( m_ea,_B ); } /* RL B=(XY+o) */ 26 OP(xycb,11) { _C = RL(RM(m_ea) ); WM( m_ea,_C ); } /* RL C=(XY+o) */ 27 OP(xycb,12) { _D = RL(RM(m_ea) ); WM( m_ea,_D ); } /* RL D=(XY+o) */ 28 OP(xycb,13) { _E = RL(RM(m_ea) ); WM( m_ea,_E ); } /* RL E=(XY+o) */ [all …]
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/z180/ |
H A D | z180xy.hxx | 7 OP(xycb,00) { _B = RLC(RM(m_ea) ); WM( m_ea,_B ); } /* RLC B=(XY+o) */ 8 OP(xycb,01) { _C = RLC(RM(m_ea) ); WM( m_ea,_C ); } /* RLC C=(XY+o) */ 9 OP(xycb,02) { _D = RLC(RM(m_ea) ); WM( m_ea,_D ); } /* RLC D=(XY+o) */ 10 OP(xycb,03) { _E = RLC(RM(m_ea) ); WM( m_ea,_E ); } /* RLC E=(XY+o) */ 11 OP(xycb,04) { _H = RLC(RM(m_ea) ); WM( m_ea,_H ); } /* RLC H=(XY+o) */ 22 OP(xycb,0e) { WM( m_ea,RRC(RM(m_ea) ) ); } /* RRC (XY+o) */ 25 OP(xycb,10) { _B = RL(RM(m_ea) ); WM( m_ea,_B ); } /* RL B=(XY+o) */ 26 OP(xycb,11) { _C = RL(RM(m_ea) ); WM( m_ea,_C ); } /* RL C=(XY+o) */ 27 OP(xycb,12) { _D = RL(RM(m_ea) ); WM( m_ea,_D ); } /* RL D=(XY+o) */ 28 OP(xycb,13) { _E = RL(RM(m_ea) ); WM( m_ea,_E ); } /* RL E=(XY+o) */ [all …]
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/dports/games/libretro-fbalpha/fbalpha-84eb9d9/src/cpu/z180/ |
H A D | z180xy.c | 5 OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */ 11 OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */ 20 OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */ 29 OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */ 83 OP(xycb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */ 92 OP(xycb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */ 101 OP(xycb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */ 110 OP(xycb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */ 119 OP(xycb,66) { BIT_XY(4,RM(EA)); } /* BIT 4,(XY+o) */ 128 OP(xycb,6e) { BIT_XY(5,RM(EA)); } /* BIT 5,(XY+o) */ [all …]
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/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/cpu/z180/ |
H A D | z180xy.c | 5 OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */ 11 OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */ 20 OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */ 29 OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */ 38 OP(xycb,1e) { WM( EA,RR( RM(EA) ) ); } /* RR (XY+o) */ 47 OP(xycb,26) { WM( EA,SLA( RM(EA) ) ); } /* SLA (XY+o) */ 83 OP(xycb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */ 92 OP(xycb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */ 101 OP(xycb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */ 110 OP(xycb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */ [all …]
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/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/cpu/z180/ |
H A D | z180xy.c | 5 OP(xycb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */ 11 OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */ 20 OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */ 29 OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */ 38 OP(xycb,1e) { WM( EA,RR( RM(EA) ) ); } /* RR (XY+o) */ 47 OP(xycb,26) { WM( EA,SLA( RM(EA) ) ); } /* SLA (XY+o) */ 83 OP(xycb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */ 92 OP(xycb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */ 101 OP(xycb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */ 110 OP(xycb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */ [all …]
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/dports/net/google-cloud-sdk-app-engine-go/platform/google_appengine/goroot-1.9/src/cmd/vendor/golang.org/x/arch/x86/x86asm/testdata/ |
H A D | libmach8db.c | 314 [0x7F] = { RM,0, "MOVO %X,%x" }, 319 [0xD6] = { RM,0, "MOVQ %X,%x" }, 361 [0x02] = { RM,0, "LAR %e,%r" }, 362 [0x03] = { RM,0, "LSL %e,%r" }, 378 [0x1F] = { RM,0, "NOP%S %e" }, 440 [0x6F] = { RM,0, "MOVQ %m,%M" }, 447 [0x7F] = { RM,0, "MOVQ %M,%m" }, 474 [0xDB] = { RM,0, "PAND %m,%M" }, 489 [0xEB] = { RM,0, "POR %m,%M" }, 493 [0xEF] = { RM,0, "PXOR %m,%M" }, [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 78 ; RM-LABEL: @multiply_1x2( 79 ; RM-NEXT: entry: 112 ; RM-NEXT: ret <4 x i32> [[TMP16]] 122 ; RM-LABEL: @multiply_2x3( 123 ; RM-NEXT: entry: [all …]
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H A D | multiply-double-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x double> [[TMP28]] 78 ; RM-LABEL: @multiply_1x2( 79 ; RM-NEXT: entry: 112 ; RM-NEXT: ret <4 x double> [[TMP16]] 122 ; RM-LABEL: @multiply_2x3( 123 ; RM-NEXT: entry: [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 78 ; RM-LABEL: @multiply_1x2( 79 ; RM-NEXT: entry: 112 ; RM-NEXT: ret <4 x i32> [[TMP16]] 122 ; RM-LABEL: @multiply_2x3( 123 ; RM-NEXT: entry: [all …]
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H A D | multiply-double-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x double> [[TMP28]] 78 ; RM-LABEL: @multiply_1x2( 79 ; RM-NEXT: entry: 112 ; RM-NEXT: ret <4 x double> [[TMP16]] 122 ; RM-LABEL: @multiply_2x3( 123 ; RM-NEXT: entry: [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x i32> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x i32> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 78 ; RM-LABEL: @multiply_1x2( 79 ; RM-NEXT: entry: 112 ; RM-NEXT: ret <4 x i32> [[TMP16]] 122 ; RM-LABEL: @multiply_2x3( 123 ; RM-NEXT: entry: [all …]
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H A D | multiply-double-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x double> [[TMP28]] 78 ; RM-LABEL: @multiply_1x2( 79 ; RM-NEXT: entry: 112 ; RM-NEXT: ret <4 x double> [[TMP16]] 122 ; RM-LABEL: @multiply_2x3( 123 ; RM-NEXT: entry: [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-double-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x double> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x double> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x i32> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x i32> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x i32> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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H A D | multiply-double-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = fadd <1 x double> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = fadd <1 x double> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x double> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x double> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/LowerMatrixIntrinsics/ |
H A D | multiply-i32-row-major.ll | 8 ; RM-LABEL: @multiply_2x2( 9 ; RM-NEXT: entry: 24 ; RM-NEXT: [[TMP4:%.*]] = add <1 x i32> [[TMP1]], [[TMP3]] 37 ; RM-NEXT: [[TMP11:%.*]] = add <1 x i32> [[TMP8]], [[TMP10]] 67 ; RM-NEXT: ret <4 x i32> [[TMP28]] 77 ; RM-LABEL: @multiply_1x2( 78 ; RM-NEXT: entry: 111 ; RM-NEXT: ret <4 x i32> [[TMP16]] 121 ; RM-LABEL: @multiply_2x3( 122 ; RM-NEXT: entry: [all …]
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